Re: [PATCH] i2c: designware: Fix false warning from i2c_dw_clk_rate()

[Jarkko Nikula <jarkko.nikula@linux.intel.com>]

On 05/11/2017 03:49 PM, Jarkko Nikula wrote:
> Commit bd698d24b1b5 ("i2c: designware: Get selected speed mode
> sda-hold-time via ACPI") causes a false warning from i2c_dw_clk_rate()
> in case platform doesn't provide explicit input clock but provides valid
> SCL timing parameters via ACPI.
>
> After above commit timing parameters only for the selected speed is get
> but code in i2c_dw_init() tries to calculate missing parameters using
> the input clock which leads to a warning when there is no input clock
> defined.
>
> Fix this by reordering the code such a way that timing parameters
> validation/calculation and setting is done for the selected speed only.
> While at it do the calculation only once during the first call.
>
> Reported-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> ---
>  drivers/i2c/busses/i2c-designware-core.c | 148 +++++++++++++++++++------------
>  1 file changed, 89 insertions(+), 59 deletions(-)
>
NAK to myself. High-speed transfers starts in fast-mode so those timing 
parameters are have to set. I'll cook another version.

-- 
Jarkko