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From: "Dhanavanthri, Swathi" <swathi.dhanavanthri@intel.com>
To: "De Marchi, Lucas" <lucas.demarchi@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/dg1: Update voltage swing tables for DP
Date: Thu, 17 Dec 2020 19:03:38 +0000	[thread overview]
Message-ID: <2e0467f2babe4d198ff93fa70adffb09@intel.com> (raw)
In-Reply-To: <20201205092446.2325265-1-lucas.demarchi@intel.com>

The table includes both hbr2 and hbr3, so it can be renamed to reflect both.

-----Original Message-----
From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Lucas De Marchi
Sent: Saturday, December 05, 2020 1:25 AM
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915/dg1: Update voltage swing tables for DP

From: Matt Roper <matthew.d.roper@intel.com>

DG1's vswing tables are the same for eDP and HDMI but have slight differences from ICL/TGL for DP.

Bspec: 49291

Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 34 ++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5193473c838c..2f9fa7b39aed 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -611,6 +611,34 @@ static const struct cnl_ddi_buf_trans jsl_combo_phy_ddi_translations_edp_hbr2[]
 	{ 0xA, 0x35, 0x3F, 0x00, 0x00 },        /* 350   350      0.0   */
 };
 
+static const struct cnl_ddi_buf_trans dg1_combo_phy_ddi_translations_dp_hbr[] = {
+						/* NT mV Trans mV db    */
+	{ 0xA, 0x32, 0x3F, 0x00, 0x00 },	/* 350   350      0.0   */
+	{ 0xA, 0x48, 0x35, 0x00, 0x0A },	/* 350   500      3.1   */
+	{ 0xC, 0x63, 0x2F, 0x00, 0x10 },	/* 350   700      6.0   */
+	{ 0x6, 0x7F, 0x2C, 0x00, 0x13 },	/* 350   900      8.2   */
+	{ 0xA, 0x43, 0x3F, 0x00, 0x00 },	/* 500   500      0.0   */
+	{ 0xC, 0x60, 0x36, 0x00, 0x09 },	/* 500   700      2.9   */
+	{ 0x6, 0x7F, 0x30, 0x00, 0x0F },	/* 500   900      5.1   */
+	{ 0xC, 0x60, 0x3F, 0x00, 0x00 },	/* 650   700      0.6   */
+	{ 0x6, 0x7F, 0x37, 0x00, 0x08 },	/* 600   900      3.5   */
+	{ 0x6, 0x7F, 0x3F, 0x00, 0x00 },	/* 900   900      0.0   */
+};
+
+static const struct cnl_ddi_buf_trans dg1_combo_phy_ddi_translations_dp_hbr2[] = {
+						/* NT mV Trans mV db    */
+	{ 0xA, 0x32, 0x3F, 0x00, 0x00 },	/* 350   350      0.0   */
+	{ 0xA, 0x48, 0x35, 0x00, 0x0A },	/* 350   500      3.1   */
+	{ 0xC, 0x63, 0x2F, 0x00, 0x10 },	/* 350   700      6.0   */
+	{ 0x6, 0x7F, 0x2C, 0x00, 0x13 },	/* 350   900      8.2   */
+	{ 0xA, 0x43, 0x3F, 0x00, 0x00 },	/* 500   500      0.0   */
+	{ 0xC, 0x60, 0x36, 0x00, 0x09 },	/* 500   700      2.9   */
+	{ 0x6, 0x7F, 0x30, 0x00, 0x0F },	/* 500   900      5.1   */
+	{ 0xC, 0x58, 0x3F, 0x00, 0x00 },	/* 650   700      0.6   */
+	{ 0x6, 0x7F, 0x35, 0x00, 0x0A },	/* 600   900      3.5   */
+	{ 0x6, 0x7F, 0x3F, 0x00, 0x00 },	/* 900   900      0.0   */
+};
+
 struct icl_mg_phy_ddi_buf_trans {
 	u32 cri_txdeemph_override_11_6;
 	u32 cri_txdeemph_override_5_0;
@@ -1093,6 +1121,12 @@ icl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
 	} else if (dev_priv->vbt.edp.low_vswing) {
 		*n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
 		return icl_combo_phy_ddi_translations_edp_hbr2;
+	} else if (IS_DG1(dev_priv) && crtc_state->port_clock > 270000) {
+		*n_entries = ARRAY_SIZE(dg1_combo_phy_ddi_translations_dp_hbr2);
+		return dg1_combo_phy_ddi_translations_dp_hbr2;
+	} else if (IS_DG1(dev_priv)) {
+		*n_entries = ARRAY_SIZE(dg1_combo_phy_ddi_translations_dp_hbr);
+		return dg1_combo_phy_ddi_translations_dp_hbr;
 	}
 
 	return icl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
--
2.29.2

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  parent reply	other threads:[~2020-12-17 19:03 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-05  9:24 [Intel-gfx] [PATCH] drm/i915/dg1: Update voltage swing tables for DP Lucas De Marchi
2020-12-05 10:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-12-05 11:56 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-12-17 19:03 ` Dhanavanthri, Swathi [this message]
2021-01-08 22:25   ` [Intel-gfx] [PATCH v2] " Matt Roper
2021-01-11 17:36     ` Clint Taylor
2020-12-17 19:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dg1: Update voltage swing tables for DP (rev2) Patchwork
2020-12-17 19:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-17 20:49 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-09  1:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg1: Update voltage swing tables for DP (rev3) Patchwork
2021-01-09  8:56 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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