From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5EBB317D6 for ; Thu, 18 Jun 2026 04:22:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.156.1 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781756576; cv=none; b=lZcYI3gMAakwkJ7G4mqDNwDFR+67Om3IH/xIDfhWP0UF4tn8tpnxxsUSOeXiabeMS4UcUjJJPLWBHnAXuW+pd+L0VCDuyvTTU9pS7X5AJSig19YVj8wZy1WuXi5dWEbvVNSlJ2YCt1i4LK8eqkwFJdzDTjptbDvNnBLhcTn2vgg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781756576; c=relaxed/simple; bh=300wYx/kO3JLwSZNMeWMxqDF70hm7lamLOlkY7GuiD0=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=lr/nvIlkVj7xkCBoKAtEh1oUkv8uCoohkOPzdayDAdTIrQKt+byfkdxzJ8WjD8WhO66bkIqaMtwu9to6suEZrjlqotiYc+716Ots4IGo1r96T8TPfv3C7KSK0AwAAgRfLf+81iDF/1OLdkxfYFQeN/uWvqmdCDy7YTCsMeKRxPY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com; spf=pass smtp.mailfrom=linux.ibm.com; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b=CWirjOQM; arc=none smtp.client-ip=148.163.156.1 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b="CWirjOQM" Received: from pps.filterd (m0360083.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65HHmNvs1106806; Thu, 18 Jun 2026 04:22:31 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pp1; bh=D+s+jV C3aVwLzY/tYSdmXPB7UYwcEqwhjkRL2KGXilg=; b=CWirjOQMz76rd/wcs1VIOZ zBrRVJGiJ0d5wNilt2oLJUiRqTo1J+ZJoTNLNpRmzhsZeIFU/tzkqpAlR6Wo2ddj xRvA1VFL9Jva9NZsor3SYSRCRQ0V19+119I7Cgujgd1VTz++YVq21Z7YHOJCpvFQ jE08lDEOUHFcdikatMaWmdagdLl3qcE4FN2xlGlDUUck4t/3ZuDS+cOtYLsAZi/Z d+SsGOfxBS6fsrOgqwapAFE4OlF8vUnDQd+nExnLp4jhFbfFnzUTqtUG/UTQPf2a uA8U30c2qQaC5/mEssOMj3BDak5QzW4Xw/nQr6QCldqdUoG3+S+eQYOr9lpuMKHQ == Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4eueqtp9dp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 18 Jun 2026 04:22:30 +0000 (GMT) Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.18.1.7/8.18.1.7) with ESMTP id 65I4JdYV005283; Thu, 18 Jun 2026 04:22:29 GMT Received: from smtprelay06.fra02v.mail.ibm.com ([9.218.2.230]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 4ev1721wn7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 18 Jun 2026 04:22:29 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay06.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 65I4MPgB31588840 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 18 Jun 2026 04:22:25 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AE3BD20043; Thu, 18 Jun 2026 04:22:25 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D4E2C20040; Thu, 18 Jun 2026 04:22:19 +0000 (GMT) Received: from [9.123.5.233] (unknown [9.123.5.233]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 18 Jun 2026 04:22:19 +0000 (GMT) Message-ID: <2e21726e-e82f-45d2-a015-917695b49253@linux.ibm.com> Date: Thu, 18 Jun 2026 09:52:18 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 06/20] sched/core: allow only preferred CPUs in is_cpu_allowed To: K Prateek Nayak , linux-kernel@vger.kernel.org, mingo@kernel.org, peterz@infradead.org, juri.lelli@redhat.com, vincent.guittot@linaro.org, yury.norov@gmail.com, iii@linux.ibm.com Cc: tglx@kernel.org, gregkh@linuxfoundation.org, pbonzini@redhat.com, seanjc@google.com, vschneid@redhat.com, huschle@linux.ibm.com, rostedt@goodmis.org, dietmar.eggemann@arm.com, mgorman@suse.de, bsegall@google.com, maddy@linux.ibm.com, srikar@linux.ibm.com, hdanton@sina.com, chleroy@kernel.org, vineeth@bitbyteword.org, frederic@kernel.org, arighi@nvidia.com, pauld@redhat.com, christian.loehle@arm.com, tj@kernel.org, tommaso.cucinotta@gmail.com, maz@kernel.org, rafael@kernel.org References: <20260617174139.155540-1-sshegde@linux.ibm.com> <20260617174139.155540-7-sshegde@linux.ibm.com> <4b74ad30-9e49-4ff3-b242-23a495e84265@amd.com> From: Shrikanth Hegde Content-Language: en-US In-Reply-To: <4b74ad30-9e49-4ff3-b242-23a495e84265@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-ORIG-GUID: XO1sd_Gw8TQbGgNecRmSDJhnBLVwm4mJ X-Proofpoint-GUID: jkWRnjZtkZ4KkNL9JmNK-q30235EcDq7 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE4MDAzNSBTYWx0ZWRfXysrrx4azxkj9 4bNFuf4Vr+9TsQ7hl16whnuUbHlsLrNZKSYeRVptdDuly1c1VHwY8hENdo5Yi/CJo10HrF6myF1 sV3ZZJwkiQDcdMTnPCevW1KE0hJiUMq51gOKwCU+alt3T9Eo7KRrSu5hliIssXZSPS56onE5O4y QZf+5xUGtHE5lHCCUvbZGOEsVZynVlNLIyH6+WR62a8ZnCgfXwqdWMhv3HS7yp2nEysFmg31/KH blLo53XbAQbNoVNEy5G3SoUeAm8p2hpdNf84by0jl1dDd7sKt9CtD2bFdRed8RhjEyXUPu6SgnW wSKs6xJp6mM6gtr98p1HLDY9tBfL608MCzNWx/sqythfVeX+Uc5ZCKreaSYvl1ZndL1B1/sLSGZ 5SNQEsh0HhqT9hgdKs9pSZmMcS6WByPXq01Xuvn2Y1q7k1q3d3lU/rxafnADR3b1EGSvgcI4dJE jhwLpBlLw674Y3xWL6Q== X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE4MDAzNSBTYWx0ZWRfX5Cl0MfHfTPWF f+LlHjLtZMhy3MjOBw9b+R1qSNL7w9GskeTazVR6Siu24RcWBjYM9JhafHiS6rmv5N3yLsmCKWz Kxe4BNDrcSqXZG9zATqtdyP/sCgonqY= X-Authority-Analysis: v=2.4 cv=B4KJFutM c=1 sm=1 tr=0 ts=6a337287 cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=iQ6ETzBq9ecOQQE5vZCe:22 a=fbrTSBC6HVe2stlN7IYA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-17_02,2026-06-17_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 phishscore=0 spamscore=0 bulkscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606180035 Hi Prateek. On 6/18/26 9:19 AM, K Prateek Nayak wrote: > Hello Shrikanth, > > On 6/17/2026 11:11 PM, Shrikanth Hegde wrote: >> --- a/include/linux/sched.h >> +++ b/include/linux/sched.h >> @@ -1657,6 +1657,7 @@ struct task_struct { >> #ifdef CONFIG_UNWIND_USER >> struct unwind_task_info unwind_info; >> #endif >> + int has_preferred_cpu_state; > > Since this only really needs 2 bits, perhaps you can use the "u8 __pad" > in the task struct? ... > >> >> /* CPU-specific state of this task: */ >> struct thread_struct thread; > > [...snip...] > >> @@ -3549,6 +3568,14 @@ static int select_fallback_rq(int cpu, struct task_struct *p) >> enum { cpuset, possible, fail } state = cpuset; >> int dest_cpu; >> >> + /* >> + * Cache value whether task's affinity spans preferred CPUs. >> + * This helps to avoid repeating the same for each CPU >> + * later in the loop. Encode call to is_cpu_allowed coming >> + * via select_fallback_rq. >> + */ >> + p->has_preferred_cpu_state = task_has_preferred_cpus(p) << 8 | 0x1; > > ... Or maybe it can be an s8 and this indicator can be a tri-state like: > > -1: Cached; preferred CPUs exists > 0: preferred CPUs not cached > 1: Cached; preferred CPUs don't exist > Yes. Current encoding has. 1. call came from select_fallback_rq and preferred CPUs exists 2. call came from select_fallback_rq and preferred CPUs doesn't exists 3. Call didn't come from select_fallback_rq and evaluate the cpumask_interesect. > and then the comparison can simply be: > > if (cached) > return cached < 0; > > ppc64le and arm64 seems to generates slightly smaller code for "< 0" > check compared to the current scheme of (& + >>) in > task_has_preferred_cpus(). > Yes, this seems better. I will give it a try.