From: Yanfei Xu <yanfei.xu@intel.com>
To: "Zhang, Tina" <tina.zhang@intel.com>,
"dwmw2@infradead.org" <dwmw2@infradead.org>,
"baolu.lu@linux.intel.com" <baolu.lu@linux.intel.com>,
"joro@8bytes.org" <joro@8bytes.org>,
"will@kernel.org" <will@kernel.org>,
"robin.murphy@arm.com" <robin.murphy@arm.com>
Cc: "iommu@lists.linux.dev" <iommu@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] iommu/vt-d: Fix to flush cache of PASID directory table
Date: Fri, 16 Jun 2023 09:37:45 +0800 [thread overview]
Message-ID: <2e467eb4-d680-df7b-9174-b9d6b6071a63@intel.com> (raw)
In-Reply-To: <MW5PR11MB5881C833CBC14D106DD9A8B5895BA@MW5PR11MB5881.namprd11.prod.outlook.com>
On 6/16/2023 7:43 AM, Zhang, Tina wrote:
> Hi,
>
>> -----Original Message-----
>> From: Yanfei Xu <yanfei.xu@intel.com>
>> Sent: Thursday, June 15, 2023 3:16 PM
>> To: dwmw2@infradead.org; baolu.lu@linux.intel.com; joro@8bytes.org;
>> will@kernel.org; robin.murphy@arm.com
>> Cc: iommu@lists.linux.dev; linux-kernel@vger.kernel.org; Xu, Yanfei
>> <yanfei.xu@intel.com>
>> Subject: [PATCH] iommu/vt-d: Fix to flush cache of PASID directory table
>>
>> Even the PCI devices don't support pasid capability, PASID table is mandatory
>> for a PCI device in scalable mode. However flushing cache of pasid directory
>> table for these devices are not taken after pasid table is allocated as the "size"
>> of table is zero. Fix to assign it with a page size.
>>
>> Fixes: 194b3348bdbb ("iommu/vt-d: Fix PASID directory pointer coherency")
>> Signed-off-by: Yanfei Xu <yanfei.xu@intel.com>
>> ---
>> drivers/iommu/intel/pasid.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index
>> c5d479770e12..bde7df055865 100644
>> --- a/drivers/iommu/intel/pasid.c
>> +++ b/drivers/iommu/intel/pasid.c
>> @@ -115,7 +115,9 @@ int intel_pasid_alloc_table(struct device *dev)
>> intel_pasid_max_id);
>>
>> size = max_pasid >> (PASID_PDE_SHIFT - 3);
>> - order = size ? get_order(size) : 0;
>> + if (!size)
>> + size = PAGE_SIZE;
> How about merging the logic of the above few lines into this one:
> size = info->pasid_supported ? max_pasid >> (PASID_PDE_SHIFT - 3) : PAGE_SIZE;
Yes, it would be more intuitive. But the prerequisite is if we can
make sure that the value of max_pasid shifted is still greater than
0. I roughly went through the PCIE spec and didn't find out where
defines the smallest PASID value for the PCIE device.
Thanks,
Yanfei
> Though the logic is about the same, the suggested one seems more intuitive.
>
> Regards,
> -Tina
>
>> + order = get_order(size);
>> pages = alloc_pages_node(info->iommu->node,
>> GFP_KERNEL | __GFP_ZERO, order);
>> if (!pages) {
>> --
>> 2.34.1
>>
next prev parent reply other threads:[~2023-06-16 1:38 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-15 7:16 [PATCH] iommu/vt-d: Fix to flush cache of PASID directory table Yanfei Xu
2023-06-15 23:43 ` Zhang, Tina
2023-06-16 1:37 ` Yanfei Xu [this message]
2023-06-16 2:01 ` Baolu Lu
2023-06-16 3:06 ` Yanfei Xu
2023-06-16 3:11 ` Baolu Lu
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