From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 35524C54EBD for ; Thu, 12 Jan 2023 08:35:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:References:Cc:To:Subject:From: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dccDj9AohJgjSelvmD8efpTLmM73gQjsh4rmQlADrp4=; b=TO5g1RyEMf2l2y 7uHZe7K/vtHzocgXhvKJbAYOU2uIK2Y7nFK/EAOY+C53BefF6DX59f3cIyIoSXqzt2GLLPpWKCN+s PmhSnFsVx67Bc/eK9U0u+12DM20FxLTuFIG2r3TGhFL3riK4agEAOYEDWKdrHrsUTcXZkIfeIKUOd oQKtuR3LtTHS2CmQ0ofWZkzHNzdAvhGxs2AAZqC6oy0PIOSrs0db1wq8d8mH0vTALLKcRf3dT8asu gpRyMVvtVgnCtV/bOf2bFXvA//K8pYJmkooYso0N+fqd/eFLUGpAg1MkIdL2OOFfc/vIZj43LYEKj yz1/S8C7A2eyURJ9r66w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pFt2O-00E766-D0; Thu, 12 Jan 2023 08:34:16 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pFt2K-00E73k-9O for linux-arm-kernel@lists.infradead.org; Thu, 12 Jan 2023 08:34:14 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E3A3AFEC; Thu, 12 Jan 2023 00:34:50 -0800 (PST) Received: from [192.168.1.12] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CD8BA3F71A; Thu, 12 Jan 2023 00:34:06 -0800 (PST) Message-ID: <2f11d495-0a2d-9cc6-d694-88d12e94d3eb@arm.com> Date: Thu, 12 Jan 2023 09:33:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 From: Pierre Gondois Subject: Re: [PATCH v2 13/23] arm64: dts: Update cache properties for microchip To: LKML Cc: Rob Herring , Krzysztof Kozlowski , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20221107155825.1644604-1-pierre.gondois@arm.com> <20221107155825.1644604-14-pierre.gondois@arm.com> Content-Language: en-US In-Reply-To: <20221107155825.1644604-14-pierre.gondois@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230112_003412_410717_58D5223F X-CRM114-Status: GOOD ( 13.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org (subset for cc list) Hello, Just a reminder in case the patch was forgotten, Regards, Pierre On 11/7/22 16:57, Pierre Gondois wrote: > The DeviceTree Specification v0.3 specifies that the cache node > 'compatible' and 'cache-level' properties are 'required'. Cf. > s3.8 Multi-level and Shared Cache Nodes > The 'cache-unified' property should be present if one of the > properties for unified cache is present ('cache-size', ...). > > Update the Device Trees accordingly. > > Signed-off-by: Pierre Gondois > --- > arch/arm64/boot/dts/microchip/sparx5.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi > index 2dd5e38820b1..c4bca23b96b9 100644 > --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi > +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi > @@ -52,6 +52,7 @@ cpu1: cpu@1 { > }; > L2_0: l2-cache0 { > compatible = "cache"; > + cache-level = <2>; > }; > }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94E08C54EBD for ; Thu, 12 Jan 2023 08:35:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239659AbjALIfF (ORCPT ); Thu, 12 Jan 2023 03:35:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239736AbjALIeq (ORCPT ); Thu, 12 Jan 2023 03:34:46 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3F5E54E423; Thu, 12 Jan 2023 00:34:09 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E3A3AFEC; Thu, 12 Jan 2023 00:34:50 -0800 (PST) Received: from [192.168.1.12] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CD8BA3F71A; Thu, 12 Jan 2023 00:34:06 -0800 (PST) Message-ID: <2f11d495-0a2d-9cc6-d694-88d12e94d3eb@arm.com> Date: Thu, 12 Jan 2023 09:33:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 From: Pierre Gondois Subject: Re: [PATCH v2 13/23] arm64: dts: Update cache properties for microchip To: LKML Cc: Rob Herring , Krzysztof Kozlowski , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20221107155825.1644604-1-pierre.gondois@arm.com> <20221107155825.1644604-14-pierre.gondois@arm.com> Content-Language: en-US In-Reply-To: <20221107155825.1644604-14-pierre.gondois@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org (subset for cc list) Hello, Just a reminder in case the patch was forgotten, Regards, Pierre On 11/7/22 16:57, Pierre Gondois wrote: > The DeviceTree Specification v0.3 specifies that the cache node > 'compatible' and 'cache-level' properties are 'required'. Cf. > s3.8 Multi-level and Shared Cache Nodes > The 'cache-unified' property should be present if one of the > properties for unified cache is present ('cache-size', ...). > > Update the Device Trees accordingly. > > Signed-off-by: Pierre Gondois > --- > arch/arm64/boot/dts/microchip/sparx5.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi > index 2dd5e38820b1..c4bca23b96b9 100644 > --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi > +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi > @@ -52,6 +52,7 @@ cpu1: cpu@1 { > }; > L2_0: l2-cache0 { > compatible = "cache"; > + cache-level = <2>; > }; > }; >