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([2600:8803:e7e4:500:e96b:b637:f05:5bfd]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-465b03b5593sm318837fac.17.2026.08.25.13.01.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 25 Aug 2026 13:01:04 -0700 (PDT) Message-ID: <2f402d43-d5f1-44bb-831c-5fdc71e12da9@baylibre.com> Date: Tue, 25 Aug 2026 15:01:02 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/6] configs: mt8188: enable eMMC FIT boot from SPL To: Carlo Caione , GSS_MTK_Uboot_upstream , u-boot@lists.u-boot-project.org Cc: Julien Masson , Quentin Schulz , Marek Vasut , Ryder Lee , Weijie Gao , Chunfeng Yun , Igor Belwon , Julien Stephan , Macpaul Lin , Tom Rini , Ilias Apalodimas , Vitor Sato Eschholz , Johan Jonker , Bastien Curutchet , Neil Armstrong , Alexey Charkov , Suhrid Subramaniam , Arnaud Ferraris , =?UTF-8?B?UGFibG8gU3VuICjlravmr5Pnv5Qp?= References: <20260814-ccaione-upstream-mt8390-spl-v4-0-f4f92978a79e@baylibre.com> <20260814-ccaione-upstream-mt8390-spl-v4-2-f4f92978a79e@baylibre.com> Content-Language: en-US From: David Lechner In-Reply-To: <20260814-ccaione-upstream-mt8390-spl-v4-2-f4f92978a79e@baylibre.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org On 8/14/26 9:47 AM, Carlo Caione wrote: > Enable the Genio 510 and Genio 700 SPL path entered by the external DDR > loader at 0x40000000. Bind the raw SPL to the loader's 0xaf000-byte copy > window, place BSS separately in DRAM, and retain the non-overlapping SPL > malloc region. > > Use generic SPL MMC, GPT, FIT, and Arm Trusted Firmware support to load > the firmware FIT from eMMC partition 1. Keep U-Boot proper at the shared > MT8188 CONFIG_TEXT_BASE of 0x4c000000. > > The MediaTek BL31 used on these boards stalls when passed the runtime > devicetree as its platform parameter. Enable SPL_ATF_NO_PLATFORM_PARAM > so SPL can still use the tree to locate OP-TEE and U-Boot while passing > NULL as the separate BL31 platform parameter. If we do another revision, it could be nice to explain where some more of these parameters come from. For example, 0x400bb800 seem quite specific like there would be a reason for it rather than a nice round number. > > Signed-off-by: Vitor Sato Eschholz > Signed-off-by: Julien Stephan > Signed-off-by: Carlo Caione > --- > configs/mt8188.config | 27 +++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > > diff --git a/configs/mt8188.config b/configs/mt8188.config > index 29e2b3db878..a84e617e30f 100644 > --- a/configs/mt8188.config > +++ b/configs/mt8188.config > @@ -28,3 +28,30 @@ CONFIG_MTK_SERIAL=y > CONFIG_WDT=y > CONFIG_WDT_MTK=y > # CONFIG_RANDOM_UUID is not set > +CONFIG_SPL=y > +CONFIG_SPL_TEXT_BASE=0x40000000 > +CONFIG_SPL_MAX_SIZE=0xaf000 > +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y > +CONFIG_SPL_BSS_START_ADDR=0x400bb800 > +CONFIG_SPL_BSS_LIMIT=y > +CONFIG_SPL_BSS_MAX_SIZE=0x100000 > +CONFIG_SPL_SYS_MALLOC=y > +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y > +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x5c000000 > +CONFIG_SPL_SYS_MALLOC_SIZE=0x9000000 > +CONFIG_SPL_SYSCON=y > +CONFIG_SPL_CLK=y > +CONFIG_SPL_SERIAL=y > +# CONFIG_SPL_USE_TINY_PRINTF is not set > +CONFIG_SPL_PINCTRL=y > +CONFIG_SPL_PINCONF=y > +CONFIG_SPL_WATCHDOG=y > +CONFIG_SPL_MMC=y > +CONFIG_SPL_LIBDISK_SUPPORT=y > +CONFIG_SPL_EFI_PARTITION=y > +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y > +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y > +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=1 > +CONFIG_SPL_LOAD_FIT=y > +CONFIG_SPL_ATF=y > +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y >