From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D52F6C433DB for ; Fri, 8 Jan 2021 14:18:36 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 75279239FE for ; Fri, 8 Jan 2021 14:18:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 75279239FE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:References: To:From:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=fEPEvIKZ5FQB1oxunVnsz0NvIh7QfKpwAqwK0Zu51Nk=; b=RStVEUWkrrm2xjiFXbhMn5B/Z y1WzJGuRvq7/odO0UL/cvD1gsCBb0szxCJ9goWF3bfSMiU4YDShWYNkgfRPo3RzC/eM0h6RyfIsV2 NPZvOAhW+Oh6yNi0e6Dzau0uiXYJCd3cva47c45hFhGEHEdtauMBeR6YAvpBklsoXFhPItebUFpUZ 1u5UMaRxae4ZzzYJsPY8UcmLI4ev1C7Wi8ZXJcSV6VxeHYHvdrCpaJvAOVf8D/QYPuIETwzLMBB76 ZKIMOt2L4h2+3klhXt1TTOGDRwQx//qK5KPL1MNcV/IAmGLErJxqaABGVQZhUL99sFJX6iv2IMEOH YB1nJq/ew==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kxsYd-0006sF-2Q; Fri, 08 Jan 2021 14:16:03 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kxsYC-0006rp-Ac for linux-arm-kernel@lists.infradead.org; Fri, 08 Jan 2021 14:15:37 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 88A0FED1; Fri, 8 Jan 2021 06:15:33 -0800 (PST) Received: from [10.57.37.195] (unknown [10.57.37.195]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C455A3F70D; Fri, 8 Jan 2021 06:15:29 -0800 (PST) Subject: Re: [PATCH v6 00/26] coresight: etm4x: Support for system instructions From: Suzuki K Poulose To: Mathieu Poirier References: <20210107123859.674252-1-suzuki.poulose@arm.com> <20210108010907.GJ43045@xps15> <7f3304f7-8c68-3a61-48da-553de87c027d@arm.com> Message-ID: <2f9d4b4e-4382-ab2a-5156-26fb9275d0f2@arm.com> Date: Fri, 8 Jan 2021 14:15:22 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <7f3304f7-8c68-3a61-48da-553de87c027d@arm.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210108_091536_497005_8BA069E9 X-CRM114-Status: GOOD ( 20.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: anshuman.khandual@arm.com, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, leo.yan@linaro.org, linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SGkgTWF0aGlldSwKClBsZWFzZSBob2xkIG9uIHdpdGggdGhpcyBzZXJpZXMsIEkgd2lsbCB1cGRh dGUgdGhlIHNlcmllcywgZml4aW5nIHRoZQppc3N1ZXMgeW91IGhhdmUgc3BvdHRlZCBhbmQgc29t ZSBhZGRpdGlvbmFsIHBhdGNoZXMgdG8gcHJldmVudCBhY2Nlc3Nlcwp0byBhbGwgdGhlIHN5c3Rl bSByZWdpc3RlcnMgdGhhdCBtYXkgbm90IGJlIGF2YWlsYWJsZSB2aWEgc3lzdGVtIGluc3RydWN0 aW9ucy4KCkFwb2xvZ2llcyBmb3IgdGhlIGluY29udmVuaWVuY2UKCktpbmQgcmVnYXJkcwpTdXp1 a2kKCk9uIDEvOC8yMSA5OjA4IEFNLCBTdXp1a2kgSyBQb3Vsb3NlIHdyb3RlOgo+IEhpIE1hdGhp ZXUKPiAKPiBPbiAxLzgvMjEgMTowOSBBTSwgTWF0aGlldSBQb2lyaWVyIHdyb3RlOgo+PiBIaSBT dXp1a2ksCj4+Cj4+IE9uIFRodSwgSmFuIDA3LCAyMDIxIGF0IDEyOjM4OjMzUE0gKzAwMDAsIFN1 enVraSBLIFBvdWxvc2Ugd3JvdGU6Cj4+PiBDb3JlU2lnaHQgRVRNdjQuNCBvYnNvbGV0ZXMgbWVt b3J5IG1hcHBlZCBhY2Nlc3MgdG8gRVRNIGFuZAo+Pj4gbWFuZGF0ZXMgdGhlIHN5c3RlbSBpbnN0 cnVjdGlvbnMgZm9yIHJlZ2lzdGVycy4KPj4+IFRoaXMgYWxzbyBpbXBsaWVzIHRoYXQgdGhleSBt YXkgbm90IGJlIG9uIHRoZSBhbWJhIGJ1cy4KPj4+IFJpZ2h0IG5vdyBhbGwgdGhlIENvcmVTaWdo dCBjb21wb25lbnRzIGFyZSBhY2Nlc3NlZCB2aWEgbWVtb3J5Cj4+PiBtYXAuIEFsc28sIHdlIGhh dmUgc29tZSBjb21tb24gcm91dGluZXMgaW4gY29yZXNpZ2h0IGdlbmVyaWMKPj4+IGNvZGUgZHJp dmVyIChlLmcsIENTX0xPQ0ssIGNsYWltL2Rpc2NsYWltKSwgd2hpY2ggYXNzdW1lIHRoZQo+Pj4g bW1pby4gSW4gb3JkZXIgdG8gcHJlc2VydmUgdGhlIGdlbmVyaWMgYWxnb3JpdGhtcyBhdCBhIHNp bmdsZQo+Pj4gcGxhY2UgYW5kIHRvIGFsbG93IGR5bmFtaWMgc3dpdGNoIGZvciBFVE1zLCB0aGlz IHNlcmllcyBpbnRyb2R1Y2VzCj4+PiBhbiBhYnN0cmFjdGlvbiBsYXllciBmb3IgYWNjZXNzaW5n IGEgY29yZXNpZ2h0IGRldmljZS4gSXQgaXMKPj4+IGRlc2lnbmVkIHN1Y2ggdGhhdCB0aGUgbW1p byBhY2Nlc3MgYXJlIGZhc3QgdHJhY2tlZCAoaS5lLCB3aXRob3V0Cj4+PiBhbiBpbmRpcmVjdCBm dW5jdGlvbiBjYWxsKS4KPj4+Cj4+PiBUaGlzIHdpbGwgYWxzbyBoZWxwIHVzIHRvIGdldCByaWQg b2YgdGhlIGRyaXZlcithdHRyaWJ1dGUgc3BlY2lmaWMKPj4+IHN5c2ZzIHNob3cvc3RvcmUgcm91 dGluZXMgYW5kIHJlcGxhY2UgdGhlbSB3aXRoIGEgc2luZ2xlIHJvdXRpbmUKPj4+IHRvIGFjY2Vz cyBhIGdpdmVuIHJlZ2lzdGVyIG9mZnNldCAod2hpY2ggY2FuIGJlIGVtYmVkZGVkIGluIHRoZQo+ Pj4gZGV2X2V4dF9hdHRyaWJ1dGUpLiBUaGlzIGlzIG5vdCBjdXJyZW50bHkgaW1wbGVtZW50ZWQg aW4gdGhlIHNlcmllcywKPj4+IGJ1dCBjYW4gYmUgYWNoaWV2ZWQuCj4+Pgo+Pj4gRnVydGhlciB3 ZSBzd2l0Y2ggdGhlIGdlbmVyaWMgcm91dGluZXMgdG8gd29yayB3aXRoIHRoZSBhYnN0cmFjdGlv bi4KPj4+IFdpdGggdGhpcyBpbiBwbGFjZSwgd2UgcmVmYWN0b3IgdGhlIGV0bTR4IGNvZGUgYSBi aXQgdG8gYWxsb3cgZm9yCj4+PiBzdXBwb3J0aW5nIHRoZSBzeXN0ZW0gaW5zdHJ1Y3Rpb25zIHdp dGggdmVyeSBsaXR0bGUgbmV3IGNvZGUuCj4+Pgo+Pj4gV2UgdXNlIFRSQ0RFVkFSQ0ggZm9yIHRo ZSBkZXRlY3Rpb24gb2YgdGhlIEVUTSBjb21wb25lbnQsIHdoaWNoCj4+PiBpcyBhIHN0YW5kYXJk IHJlZ2lzdGVyIGFzIHBlciBDb3JlU2lnaHQgYXJjaGl0ZWN0dXJlLCByYXRoZXIgdGhhbgo+Pj4g dGhlIGV0bSBzcGVjaWZpYyBpZCByZWdpc3RlciBUUkNJRFIxLiBUaGlzIGlzIGZvciBtYWtpbmcg c3VyZQo+Pj4gdGhhdCB3ZSBhcmUgYWJsZSB0byBkZXRlY3QgdGhlIEVUTSB2aWEgc3lzdGVtIGlu c3RydWN0aW9ucyBhY2N1cmF0ZWx5LAo+Pj4gd2hlbiB0aGUgdGhlIHRyYWNlIHVuaXQgY291bGQg YmUgYW55dGhpbmcgKGV0bSBvciBhIGN1c3RvbSB0cmFjZSB1bml0KS4KPj4+IFRvIGtlZXAgdGhl IGJhY2t3YXJkIGNvbXBhdGliaWxpdHkgZm9yIGFueSBleGlzdGluZyBicm9rZW4KPj4+IGltcGVs ZW1lbnRhdGlvbiB3aGljaCBtYXkgbm90IGltcGxlbWVudCBUUkNERVZBUkNILCB3ZSBmYWxsIGJh Y2sgdG8gVFJDSURSMS4KPj4+IEFsc28gdGhpcyBjb3ZlcnMgdXMgZm9yIHRoZSBjaGFuZ2VzIGlu IHRoZSBmdXR1cmUgYXJjaGl0ZWN0dXJlIFswXS4KPj4+Cj4+PiBBbHNvLCB2OC40IHNlbGYtaG9z dGVkIHRyYWNpbmcgZXh0ZW5zaW9ucyAoY291cGxlZCB3aXRoIEVUTXY0LjQpIGFkZHMKPj4+IG5l dyBmaWx0ZXJpbmcgcmVnaXN0ZXJzIGZvciB0cmFjZSBieSBleGNlcHRpb24gbGV2ZWwuIFNvIG9u IGEgdjguNAo+Pj4gc3lzdGVtLCB3aXRoIFRyYWNlIEZpbHRlcmluZyBzdXBwb3J0LCB3aXRob3V0 IHRoZSBhcHByb3ByaWF0ZQo+Pj4gcHJvZ3JhbW1pbmcgb2YgdGhlIFRyYWNlIGZpbHRlciByZWdp c3RlcnMgKFRSRkNSX0VMeCksIHRyYWNpbmcKPj4+IHdpbGwgbm90IGJlIGVuYWJsZWQuIFRoaXMg c2VyaWVzIGFsc28gaW5jbHVkZXMgdGhlIFRyYWNlRmlsdGVyaW5nCj4+PiBzdXBwb3J0IHRvIGNv dmVyIHRoZSBFVE0tdjQuNCBzdXBwb3J0Lgo+Pj4KPj4+IFRoZSBzZXJpZXMgaGFzIGJlZW4gbWls ZGx5IHRlc3RlZCBvbiBhIG1vZGVsIGZvciBzeXN0ZW0gaW5zdHJ1Y3Rpb25zLgo+Pj4gSSB3b3Vs ZCByZWFsbHkgYXBwcmVjaWF0ZSBhbnkgdGVzdGluZyBvbiByZWFsIGhhcmR3YXJlLgo+Pgo+PiBJ IGhhdmUgcXVldWVkIHlvdXIgd29yayBpbiBteSBsb2NhbCB0cmVlLsKgIEkgd2lsbCBoYXZlIGEg ZmluYWwgcGFzcyBiZWZvcmUKPj4gcHVzaGluZyB0byBjb3Jlc2lnaHQtbmV4dCB0b21vcnJvdyBv ciBvbiBNb25kYXkuCj4+Cj4gCj4gVGhhbmtzIGZvciB0aGUgcmV2aWV3IGFuZCBmaXh1cHMuIFBs ZWFzZSBsZXQgbWUga25vdyBpZiB5b3UgbmVlZCBhIHJlc3Bpbi4KPiAKPiBDaGVlcnMKPiBTdXp1 a2kKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51 eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVh ZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1h cm0ta2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 188B9C433DB for ; Fri, 8 Jan 2021 14:16:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C9E3923A00 for ; Fri, 8 Jan 2021 14:16:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727252AbhAHOQU (ORCPT ); Fri, 8 Jan 2021 09:16:20 -0500 Received: from foss.arm.com ([217.140.110.172]:51872 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725817AbhAHOQT (ORCPT ); Fri, 8 Jan 2021 09:16:19 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 88A0FED1; Fri, 8 Jan 2021 06:15:33 -0800 (PST) Received: from [10.57.37.195] (unknown [10.57.37.195]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C455A3F70D; Fri, 8 Jan 2021 06:15:29 -0800 (PST) Subject: Re: [PATCH v6 00/26] coresight: etm4x: Support for system instructions From: Suzuki K Poulose To: Mathieu Poirier Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, leo.yan@linaro.org, mike.leach@linaro.org, anshuman.khandual@arm.com References: <20210107123859.674252-1-suzuki.poulose@arm.com> <20210108010907.GJ43045@xps15> <7f3304f7-8c68-3a61-48da-553de87c027d@arm.com> Message-ID: <2f9d4b4e-4382-ab2a-5156-26fb9275d0f2@arm.com> Date: Fri, 8 Jan 2021 14:15:22 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <7f3304f7-8c68-3a61-48da-553de87c027d@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mathieu, Please hold on with this series, I will update the series, fixing the issues you have spotted and some additional patches to prevent accesses to all the system registers that may not be available via system instructions. Apologies for the inconvenience Kind regards Suzuki On 1/8/21 9:08 AM, Suzuki K Poulose wrote: > Hi Mathieu > > On 1/8/21 1:09 AM, Mathieu Poirier wrote: >> Hi Suzuki, >> >> On Thu, Jan 07, 2021 at 12:38:33PM +0000, Suzuki K Poulose wrote: >>> CoreSight ETMv4.4 obsoletes memory mapped access to ETM and >>> mandates the system instructions for registers. >>> This also implies that they may not be on the amba bus. >>> Right now all the CoreSight components are accessed via memory >>> map. Also, we have some common routines in coresight generic >>> code driver (e.g, CS_LOCK, claim/disclaim), which assume the >>> mmio. In order to preserve the generic algorithms at a single >>> place and to allow dynamic switch for ETMs, this series introduces >>> an abstraction layer for accessing a coresight device. It is >>> designed such that the mmio access are fast tracked (i.e, without >>> an indirect function call). >>> >>> This will also help us to get rid of the driver+attribute specific >>> sysfs show/store routines and replace them with a single routine >>> to access a given register offset (which can be embedded in the >>> dev_ext_attribute). This is not currently implemented in the series, >>> but can be achieved. >>> >>> Further we switch the generic routines to work with the abstraction. >>> With this in place, we refactor the etm4x code a bit to allow for >>> supporting the system instructions with very little new code. >>> >>> We use TRCDEVARCH for the detection of the ETM component, which >>> is a standard register as per CoreSight architecture, rather than >>> the etm specific id register TRCIDR1. This is for making sure >>> that we are able to detect the ETM via system instructions accurately, >>> when the the trace unit could be anything (etm or a custom trace unit). >>> To keep the backward compatibility for any existing broken >>> impelementation which may not implement TRCDEVARCH, we fall back to TRCIDR1. >>> Also this covers us for the changes in the future architecture [0]. >>> >>> Also, v8.4 self-hosted tracing extensions (coupled with ETMv4.4) adds >>> new filtering registers for trace by exception level. So on a v8.4 >>> system, with Trace Filtering support, without the appropriate >>> programming of the Trace filter registers (TRFCR_ELx), tracing >>> will not be enabled. This series also includes the TraceFiltering >>> support to cover the ETM-v4.4 support. >>> >>> The series has been mildly tested on a model for system instructions. >>> I would really appreciate any testing on real hardware. >> >> I have queued your work in my local tree.  I will have a final pass before >> pushing to coresight-next tomorrow or on Monday. >> > > Thanks for the review and fixups. Please let me know if you need a respin. > > Cheers > Suzuki