From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from perceval.ideasonboard.com ([213.167.242.64]:60800 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726702AbeHCAjW (ORCPT ); Thu, 2 Aug 2018 20:39:22 -0400 From: Laurent Pinchart To: Kieran Bingham Cc: Kieran Bingham , linux-renesas-soc@vger.kernel.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, Kieran Bingham Subject: Re: [PATCH v5 11/11] drm: rcar-du: Support interlaced video output through vsp1 Date: Fri, 03 Aug 2018 01:46:47 +0300 Message-ID: <3027558.uxErW1qWp6@avalon> In-Reply-To: <0c4309e0e053bdad2221aeee49c763568a304dbd.1531857988.git-series.kieran.bingham+renesas@ideasonboard.com> References: <0c4309e0e053bdad2221aeee49c763568a304dbd.1531857988.git-series.kieran.bingham+renesas@ideasonboard.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Hi Kieran, Thank you for the patch. On Tuesday, 17 July 2018 23:35:53 EEST Kieran Bingham wrote: > From: Kieran Bingham > > Use the newly exposed VSP1 interface to enable interlaced frame support > through the VSP1 LIF pipelines. > > The DSMR register is updated to set the ODEV flag on interlaced > pipelines, thus defining an interlaced stream as having the ODD field > located in the second half (BOTTOM) of the frame buffer. > > Signed-off-by: Kieran Bingham Reviewed-by: Laurent Pinchart > --- > v5 > - Fix commit title > - Document change to DSMR > - Configure through vsp1_du_setup_lif(), rather than > vsp1_du_atomic_update() > > drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 1 + > drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 15dc9caa128b..b52b3e817b93 > 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > @@ -289,6 +289,7 @@ static void rcar_du_crtc_set_display_timing(struct > rcar_du_crtc *rcrtc) /* Signal polarities */ > value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DSMR_VSL : 0) > > | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? DSMR_HSL : 0) > > + | ((mode->flags & DRM_MODE_FLAG_INTERLACE) ? DSMR_ODEV : 0) > > | DSMR_DIPM_DISP | DSMR_CSPM; > > rcar_du_crtc_write(rcrtc, DSMR, value); > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c index 72eebeda518e..a042f116731b > 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > @@ -52,6 +52,7 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) > struct vsp1_du_lif_config cfg = { > .width = mode->hdisplay, > .height = mode->vdisplay, > + .interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE, > .callback = rcar_du_vsp_complete, > .callback_data = crtc, > }; -- Regards, Laurent Pinchart From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Subject: Re: [PATCH v5 11/11] drm: rcar-du: Support interlaced video output through vsp1 Date: Fri, 03 Aug 2018 01:46:47 +0300 Message-ID: <3027558.uxErW1qWp6@avalon> References: <0c4309e0e053bdad2221aeee49c763568a304dbd.1531857988.git-series.kieran.bingham+renesas@ideasonboard.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 90B576E646 for ; Thu, 2 Aug 2018 22:46:07 +0000 (UTC) In-Reply-To: <0c4309e0e053bdad2221aeee49c763568a304dbd.1531857988.git-series.kieran.bingham+renesas@ideasonboard.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Kieran Bingham Cc: linux-renesas-soc@vger.kernel.org, Kieran Bingham , Kieran Bingham , dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org List-Id: dri-devel@lists.freedesktop.org SGkgS2llcmFuLAoKVGhhbmsgeW91IGZvciB0aGUgcGF0Y2guCgpPbiBUdWVzZGF5LCAxNyBKdWx5 IDIwMTggMjM6MzU6NTMgRUVTVCBLaWVyYW4gQmluZ2hhbSB3cm90ZToKPiBGcm9tOiBLaWVyYW4g QmluZ2hhbSA8a2llcmFuLmJpbmdoYW0rcmVuZXNhc0BpZGVhc29uYm9hcmQuY29tPgo+IAo+IFVz ZSB0aGUgbmV3bHkgZXhwb3NlZCBWU1AxIGludGVyZmFjZSB0byBlbmFibGUgaW50ZXJsYWNlZCBm cmFtZSBzdXBwb3J0Cj4gdGhyb3VnaCB0aGUgVlNQMSBMSUYgcGlwZWxpbmVzLgo+IAo+IFRoZSBE U01SIHJlZ2lzdGVyIGlzIHVwZGF0ZWQgdG8gc2V0IHRoZSBPREVWIGZsYWcgb24gaW50ZXJsYWNl ZAo+IHBpcGVsaW5lcywgdGh1cyBkZWZpbmluZyBhbiBpbnRlcmxhY2VkIHN0cmVhbSBhcyBoYXZp bmcgdGhlIE9ERCBmaWVsZAo+IGxvY2F0ZWQgaW4gdGhlIHNlY29uZCBoYWxmIChCT1RUT00pIG9m IHRoZSBmcmFtZSBidWZmZXIuCj4gCj4gU2lnbmVkLW9mZi1ieTogS2llcmFuIEJpbmdoYW0gPGtp ZXJhbi5iaW5naGFtK3JlbmVzYXNAaWRlYXNvbmJvYXJkLmNvbT4KClJldmlld2VkLWJ5OiBMYXVy ZW50IFBpbmNoYXJ0IDxsYXVyZW50LnBpbmNoYXJ0QGlkZWFzb25ib2FyZC5jb20+Cgo+IC0tLQo+ IHY1Cj4gIC0gRml4IGNvbW1pdCB0aXRsZQo+ICAtIERvY3VtZW50IGNoYW5nZSB0byBEU01SCj4g IC0gQ29uZmlndXJlIHRocm91Z2ggdnNwMV9kdV9zZXR1cF9saWYoKSwgcmF0aGVyIHRoYW4KPiAg ICB2c3AxX2R1X2F0b21pY191cGRhdGUoKQo+IAo+ICBkcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9y Y2FyX2R1X2NydGMuYyB8IDEgKwo+ICBkcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X3Zz cC5jICB8IDEgKwo+ICAyIGZpbGVzIGNoYW5nZWQsIDIgaW5zZXJ0aW9ucygrKQo+IAo+IGRpZmYg LS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2NydGMuYwo+IGIvZHJpdmVy cy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV9jcnRjLmMgaW5kZXggMTVkYzljYWExMjhiLi5iNTJi M2U4MTdiOTMKPiAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1 X2NydGMuYwo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfY3J0Yy5jCj4g QEAgLTI4OSw2ICsyODksNyBAQCBzdGF0aWMgdm9pZCByY2FyX2R1X2NydGNfc2V0X2Rpc3BsYXlf dGltaW5nKHN0cnVjdAo+IHJjYXJfZHVfY3J0YyAqcmNydGMpIC8qIFNpZ25hbCBwb2xhcml0aWVz ICovCj4gIAl2YWx1ZSA9ICgobW9kZS0+ZmxhZ3MgJiBEUk1fTU9ERV9GTEFHX1BWU1lOQykgPyBE U01SX1ZTTCA6IDApCj4gCj4gIAkgICAgICB8ICgobW9kZS0+ZmxhZ3MgJiBEUk1fTU9ERV9GTEFH X1BIU1lOQykgPyBEU01SX0hTTCA6IDApCj4gCj4gKwkgICAgICB8ICgobW9kZS0+ZmxhZ3MgJiBE Uk1fTU9ERV9GTEFHX0lOVEVSTEFDRSkgPyBEU01SX09ERVYgOiAwKQo+IAo+ICAJICAgICAgfCBE U01SX0RJUE1fRElTUCB8IERTTVJfQ1NQTTsKPiAKPiAgCXJjYXJfZHVfY3J0Y193cml0ZShyY3J0 YywgRFNNUiwgdmFsdWUpOwo+IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcmNhci1k dS9yY2FyX2R1X3ZzcC5jCj4gYi9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X3ZzcC5j IGluZGV4IDcyZWViZWRhNTE4ZS4uYTA0MmYxMTY3MzFiCj4gMTAwNjQ0Cj4gLS0tIGEvZHJpdmVy cy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV92c3AuYwo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9y Y2FyLWR1L3JjYXJfZHVfdnNwLmMKPiBAQCAtNTIsNiArNTIsNyBAQCB2b2lkIHJjYXJfZHVfdnNw X2VuYWJsZShzdHJ1Y3QgcmNhcl9kdV9jcnRjICpjcnRjKQo+ICAJc3RydWN0IHZzcDFfZHVfbGlm X2NvbmZpZyBjZmcgPSB7Cj4gIAkJLndpZHRoID0gbW9kZS0+aGRpc3BsYXksCj4gIAkJLmhlaWdo dCA9IG1vZGUtPnZkaXNwbGF5LAo+ICsJCS5pbnRlcmxhY2VkID0gbW9kZS0+ZmxhZ3MgJiBEUk1f TU9ERV9GTEFHX0lOVEVSTEFDRSwKPiAgCQkuY2FsbGJhY2sgPSByY2FyX2R1X3ZzcF9jb21wbGV0 ZSwKPiAgCQkuY2FsbGJhY2tfZGF0YSA9IGNydGMsCj4gIAl9OwoKLS0gClJlZ2FyZHMsCgpMYXVy ZW50IFBpbmNoYXJ0CgoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9w Lm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1k ZXZlbAo=