From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kenneth Graunke Subject: Re: [Mesa-dev] [PATCH 1/2] i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions. Date: Wed, 06 May 2015 10:41:34 -0700 Message-ID: <30445906.Uy24vLNqI1@eiger> References: <1429679612-18584-1-git-send-email-kenneth@whitecape.org> <20150506134537.GR22099@nuc-i3427.alporthouse.com> <877fslzkhj.fsf@gaia.fi.intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0462622707==" Return-path: Received: from smtp145.dfw.emailsrvr.com (smtp145.dfw.emailsrvr.com [67.192.241.145]) by gabe.freedesktop.org (Postfix) with ESMTP id F2E4A6E702 for ; Wed, 6 May 2015 10:41:49 -0700 (PDT) In-Reply-To: <877fslzkhj.fsf@gaia.fi.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Mika Kuoppala Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org --===============0462622707== Content-Type: multipart/signed; boundary="nextPart5937985.WG7JZB4uSB"; micalg="pgp-sha256"; protocol="application/pgp-signature" --nextPart5937985.WG7JZB4uSB Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" On Wednesday, May 06, 2015 08:25:28 PM Mika Kuoppala wrote: > Chris Wilson writes: > > > On Wed, May 06, 2015 at 03:38:44PM +0200, Daniel Vetter wrote: > >> On Tue, Apr 21, 2015 at 10:13:31PM -0700, Kenneth Graunke wrote: > >> > The BLT engine on Gen8+ requires linear surfaces to be cacheline > >> > aligned. This restriction was added as part of converting the BLT to > >> > use 48-bit addressing. > >> > > >> > intel_emit_linear_blit needs to handle blits that are not cacheline > >> > aligned, as we use it for arbitrary glBufferSubData calls and subrange > >> > mappings. > >> > > >> > Since intel_emit_linear_blit uses 1 byte per pixel, we can use the src/dst > >> > pixel X offset field to represent the unaligned portion, and subtract > >> > that from the address so it's cacheline aligned. > >> > > >> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521 > >> > Signed-off-by: Kenneth Graunke > >> > Cc: mesa-stable@lists.freedesktop.org > >> > >> s/cacheline/page/ afaik, and nope it's not documented. Chris&Mika learned > >> that the hard way. Adding them to correct me in case I make a mess again. > > > > It's cacheline. > > > > Issue: if the 1st pixel in XY_SRC_COPY is not CL aligned when SRC or > > DST are linear that will cause failure. > > > > https://vthsd.fm.intel.com/hsd/bdwgfx/bug_de/default.aspx?bug_de_id=1912704 > > -Chris > > > > FWIF, I ended up doing it like this in igt: > > http://lists.freedesktop.org/archives/intel-gfx/2015-January/059191.html > > And I think the documentation was updated on the restrictions. > > -Mika Yeah, I saw the updated documentation, remembered that Chris warned me about this a while back (I think I just said "ugh" and promptly forgot about it), and finally fixed Mesa. It's all upstream and working now. Huge thanks for tracking this down and getting it documented! --nextPart5937985.WG7JZB4uSB Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. Content-Transfer-Encoding: 7Bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJVSlJOAAoJEFtb2gcdScw4LIMP/A3BseG95yK+FgrTUhJG5P06 ErKxFjS4Nv/RKFYNfFBUQoR7UL+I1gF7zdN7UtboMNIkHN+cRkilOYDQKlVHjaNm vjVmUh593Ae/SioGaebIsVC7Udkf/XzxIrZA+eIGQ3qe6Dzh8V4n4IWW7kVNkCh1 FL00FC2fvctAsuoQs52+mJSawam3Rkk4u6KEcRIWmuTea2+aYK0LzKuqzOFkYzi1 5xuVjoZBw7Fzn26ZzYDcy/FknMEqR1P6o8LENBsBPFaZ9DgXZ3OAtB7FNm5agrkO cswWrkVK+6e3oCj7VTdvWSM+2GLzKhZYgbs6vlWWBPeR5wWb6ndmy916mnj3NJJV gNEBcxMGrxTwvt5nb2BEv4BRmCaLvn69edt592yUec/BegWACZrn1JC0VgK9fywn Ji3STPtuRjn2IMmiCyU/oMMXikB4Jy9dA0KE+8/5iklrAoF2kCAB9efQd+d44BAx yN03aTlwITTk5rY1FaY+0fBoWW9VQz2VDynXCEm+M5G8tt9mQL8tbW82sM5rUW9s f3dINFb4PMxrALzrm794Pw2fdi7P1lGpjaHrbpf8bjQAtSPGue1hfbJA91d2NmGS 3a6X0he+EyCDYLm+PYOtx6Kb6VSAA5d1QmLQhCsmx6ScQ3ugJ6WIrCFHFCn8Avju 4Gx3yo/DS9XndtDRO7ye =P8Ki -----END PGP SIGNATURE----- --nextPart5937985.WG7JZB4uSB-- --===============0462622707== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK --===============0462622707==--