From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB4D23CB8F0; Fri, 3 Jul 2026 14:23:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783088625; cv=none; b=d+BYRaSuzNyoKL1swdbyOy25z0dhEs/JzZXYdXn+pgMtEMmqjhwhaRe+VWHGrvUYacE1iZ7Py3OtF0mNRPkeqYV68buuRoWgfJ9wMwkwzwSLdEWJI2miIhOZuAZNEEMgRSnJYXwiyf//HjRl6+RvqY2qUyhX96jYNh7jJoF5mGA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783088625; c=relaxed/simple; bh=6wIbRy2Zdm8ebG9nOt2I/vQJTjjJO0MMn6scd/YZzwc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=tXaUNjFA7l1JJnUoqGydno8cxy4+6DhdXse6NE5y64ToUMju5C5yFS0l1sd9eQh5sjgEiWzuxBVHGUvj6r7kkLHxWjMJYcF32d5bnml+yHvYVNl/9at+8h0WQ46t3I7r45wuXGFamvXGJNexp6N7IOsnhijgNNgGGn5yzg87KmI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=TPLyRFDV; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="TPLyRFDV" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Type:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To; bh=1lCH77eIOkpyT6UD6CNZ7GGsrspDZ0kqeiwmNw7g46I=; b=TPLyRFDV5oqX2oLuzs2c7r4tay CsE76Bq2bIY/IcZOm78Rj0OUPdsOmW/E9AL0oHE2vGBwCCUqRJcsCspd6RWCkl1FjrzE2yP8VjD5c o69aPl5YR/YB2/DP5acrfQX5WgAfQRCgG5hUs+PQ0JPOIFbH20tsG4BMCh3Wtdwe/bDwna5fkYl6X 614NQpT8M06EOrbiSrzhf0Q/XhQycxO4Z8DIPHrXqSu/UCI9OjhdcEJqEf+TEfU95qDXwehdI/KDi WE1Of/5DDRF1pKFiqava9nEWMeJm1Mf4HrwFgoHnT1E/Qxs3G/ag/VLsvkz1bQyWEloSNWnjEjX1H oVkrIpwA==; From: Heiko =?UTF-8?B?U3TDvGJuZXI=?= To: Cunhao Lu <1579567540@qq.com>, Marc Kleine-Budde , kernel@pengutronix.de, Vincent Mailhol , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Quentin Schulz Cc: linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Heiko Stuebner Subject: Re: [PATCH v4 4/4] arm64: dts: rockchip: Enable CAN controller on RK3588-Tiger-Haikou Date: Fri, 03 Jul 2026 16:23:22 +0200 Message-ID: <3078012.2VHbPRQshP@diego> In-Reply-To: References: <20260703-master-v4-0-47d40bbf5fda@qq.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Am Freitag, 3. Juli 2026, 16:05:18 Mitteleurop=C3=A4ische Sommerzeit schrie= b Quentin Schulz: > Hi Heiko, Cunhao, >=20 > On 7/3/26 10:01 AM, Cunhao Lu wrote: > > From: Heiko Stuebner > >=20 > > CAN0 is piped through the Q7-connector to the CAN-Header on the Haikou > > base-board, so enable support for it there. > >=20 > > At least on RK3588-Tiger, the CAN clocks default to 99MHz, limiting > > usable CAN bitrates without skew. Errata documentation mentions > > 300MHz as the default frequency on RK3568, so replicate this here > > to allow more bitrates. > >=20 > > Signed-off-by: Heiko Stuebner > > Signed-off-by: Cunhao Lu <1579567540@qq.com> > > --- > > arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts | 6 ++++++ > > 1 file changed, 6 insertions(+) > >=20 > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts b/arc= h/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts > > index 873fbeb8daa1..6273e695b039 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts > > +++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts > > @@ -155,6 +155,12 @@ vddd_audio_1v6: regulator-vddd-audio-1v6 { > > }; > > }; > > =20 > > +&can0 { > > + assigned-clocks =3D <&cru CLK_CAN0>; > > + assigned-clock-rates =3D <300000000>; >=20 > Why is this not SoC-specific? We are only routing the signal from the=20 > SoC after all. My main reason was that I have no clue what a reasonable controller frequency is. The default on Tiger on boot is 99MHz, which causes problems with accurate rates. Similarly the controller has issues with low clock rates (erratum 5 if I'm not mistaken) and ther Mark wrote that at 300MHz the issue is less visible. So I took that frequency, but have no clue what the "right" frequency is. Similarly, only Renesas socs seem to set their can frequency in the DT and that to 40MHz. In the Rockchip vendor-kernel I've seen rates to set to 150MHz, 200MHz (or left alone) on a board-level rk3568-ok3568c.dts even sets both 150MHZ AND 200MHz depending on the CAN controller (200 for can0+1, 150 for can2) . This does suggest the usable frequency being specific to the board-design. > If it cannot be put into rk3588-base.dtsi for some reason and is=20 > product-specific... Why is this in the baseboard DTS and not in the SoM=20 > DTSI? I would like to avoid our customers to have to copy things over if= =20 > they should just work on their baseboard too if they don't do crazy=20 > things there. We can of course move the clk-rate to the tiger.dtsi. (This should not affect the rest of the series, as I'll be applying the dts patches anyway) Heiko > I'll try to find time to test the three CAN controllers on RK3588 Jaguar= =20 > with the CAN1-CAN2-UART4 Mezzanine adapter board and will contribute an=20 > overlay for that if it goes well. I don't have a CAN-FD adapter though=20 > but I hope they reused the exact same IP for the three controllers in=20 > the SoC :) From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B614CC43458 for ; Fri, 3 Jul 2026 14:23:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JsgwG04U2bKyHVBhmvPrU7H6D1MGddPG99rqz9/Y5pc=; b=RMrC0s3U2beJdY Oxh53gyih9ReQMlZmyrzQlv39NTdNhNNVtd2JiNW0ytqkqTbIFhG4yNkdRAIVdQYhfSV8cfkiy15P SRv4dS5jvo0NlTvZBnSKakbAdiPCBU/1V3zbkd0pSh5UxXzkKgdbHjHMW4cVhOBGePvvgedbFCwrS tIdPFrqsVnf4l1RguMAEPuNWAjY+y7qnQG6W7kNMzrab+TGhH+rcRAxBSlDVwOBriaNtNMDghkkot y3Zb8hYwkvxj3/gBURsiratykaSyLfBCMiBfmebVzCOQMRnsdS0nASGkqXcX0WqIDoix42Q/+4C+6 zEZVRnlktVBGoRRot/zA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wfenx-00000007FXG-2LVy; Fri, 03 Jul 2026 14:23:45 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wfent-00000007FVK-2xQn; Fri, 03 Jul 2026 14:23:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Type:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To; bh=1lCH77eIOkpyT6UD6CNZ7GGsrspDZ0kqeiwmNw7g46I=; b=TPLyRFDV5oqX2oLuzs2c7r4tay CsE76Bq2bIY/IcZOm78Rj0OUPdsOmW/E9AL0oHE2vGBwCCUqRJcsCspd6RWCkl1FjrzE2yP8VjD5c o69aPl5YR/YB2/DP5acrfQX5WgAfQRCgG5hUs+PQ0JPOIFbH20tsG4BMCh3Wtdwe/bDwna5fkYl6X 614NQpT8M06EOrbiSrzhf0Q/XhQycxO4Z8DIPHrXqSu/UCI9OjhdcEJqEf+TEfU95qDXwehdI/KDi WE1Of/5DDRF1pKFiqava9nEWMeJm1Mf4HrwFgoHnT1E/Qxs3G/ag/VLsvkz1bQyWEloSNWnjEjX1H oVkrIpwA==; From: Heiko =?UTF-8?B?U3TDvGJuZXI=?= To: Cunhao Lu <1579567540@qq.com>, Marc Kleine-Budde , kernel@pengutronix.de, Vincent Mailhol , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Quentin Schulz Cc: linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Heiko Stuebner Subject: Re: [PATCH v4 4/4] arm64: dts: rockchip: Enable CAN controller on RK3588-Tiger-Haikou Date: Fri, 03 Jul 2026 16:23:22 +0200 Message-ID: <3078012.2VHbPRQshP@diego> In-Reply-To: References: <20260703-master-v4-0-47d40bbf5fda@qq.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260703_072341_866295_CB029ED6 X-CRM114-Status: GOOD ( 30.82 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org QW0gRnJlaXRhZywgMy4gSnVsaSAyMDI2LCAxNjowNToxOCBNaXR0ZWxldXJvcMOkaXNjaGUgU29t bWVyemVpdCBzY2hyaWViIFF1ZW50aW4gU2NodWx6Ogo+IEhpIEhlaWtvLCBDdW5oYW8sCj4gCj4g T24gNy8zLzI2IDEwOjAxIEFNLCBDdW5oYW8gTHUgd3JvdGU6Cj4gPiBGcm9tOiBIZWlrbyBTdHVl Ym5lciA8aGVpa28uc3R1ZWJuZXJAY2hlcnJ5LmRlPgo+ID4gCj4gPiBDQU4wIGlzIHBpcGVkIHRo cm91Z2ggdGhlIFE3LWNvbm5lY3RvciB0byB0aGUgQ0FOLUhlYWRlciBvbiB0aGUgSGFpa291Cj4g PiBiYXNlLWJvYXJkLCBzbyBlbmFibGUgc3VwcG9ydCBmb3IgaXQgdGhlcmUuCj4gPiAKPiA+IEF0 IGxlYXN0IG9uIFJLMzU4OC1UaWdlciwgdGhlIENBTiBjbG9ja3MgZGVmYXVsdCB0byA5OU1Ieiwg bGltaXRpbmcKPiA+IHVzYWJsZSBDQU4gYml0cmF0ZXMgd2l0aG91dCBza2V3LiBFcnJhdGEgZG9j dW1lbnRhdGlvbiBtZW50aW9ucwo+ID4gMzAwTUh6IGFzIHRoZSBkZWZhdWx0IGZyZXF1ZW5jeSBv biBSSzM1NjgsIHNvIHJlcGxpY2F0ZSB0aGlzIGhlcmUKPiA+IHRvIGFsbG93IG1vcmUgYml0cmF0 ZXMuCj4gPiAKPiA+IFNpZ25lZC1vZmYtYnk6IEhlaWtvIFN0dWVibmVyIDxoZWlrby5zdHVlYm5l ckBjaGVycnkuZGU+Cj4gPiBTaWduZWQtb2ZmLWJ5OiBDdW5oYW8gTHUgPDE1Nzk1Njc1NDBAcXEu Y29tPgo+ID4gLS0tCj4gPiAgIGFyY2gvYXJtNjQvYm9vdC9kdHMvcm9ja2NoaXAvcmszNTg4LXRp Z2VyLWhhaWtvdS5kdHMgfCA2ICsrKysrKwo+ID4gICAxIGZpbGUgY2hhbmdlZCwgNiBpbnNlcnRp b25zKCspCj4gPiAKPiA+IGRpZmYgLS1naXQgYS9hcmNoL2FybTY0L2Jvb3QvZHRzL3JvY2tjaGlw L3JrMzU4OC10aWdlci1oYWlrb3UuZHRzIGIvYXJjaC9hcm02NC9ib290L2R0cy9yb2NrY2hpcC9y azM1ODgtdGlnZXItaGFpa291LmR0cwo+ID4gaW5kZXggODczZmJlYjhkYWExLi42MjczZTY5NWIw MzkgMTAwNjQ0Cj4gPiAtLS0gYS9hcmNoL2FybTY0L2Jvb3QvZHRzL3JvY2tjaGlwL3JrMzU4OC10 aWdlci1oYWlrb3UuZHRzCj4gPiArKysgYi9hcmNoL2FybTY0L2Jvb3QvZHRzL3JvY2tjaGlwL3Jr MzU4OC10aWdlci1oYWlrb3UuZHRzCj4gPiBAQCAtMTU1LDYgKzE1NSwxMiBAQCB2ZGRkX2F1ZGlv XzF2NjogcmVndWxhdG9yLXZkZGQtYXVkaW8tMXY2IHsKPiA+ICAgCX07Cj4gPiAgIH07Cj4gPiAg IAo+ID4gKyZjYW4wIHsKPiA+ICsJYXNzaWduZWQtY2xvY2tzID0gPCZjcnUgQ0xLX0NBTjA+Owo+ ID4gKwlhc3NpZ25lZC1jbG9jay1yYXRlcyA9IDwzMDAwMDAwMDA+Owo+IAo+IFdoeSBpcyB0aGlz IG5vdCBTb0Mtc3BlY2lmaWM/IFdlIGFyZSBvbmx5IHJvdXRpbmcgdGhlIHNpZ25hbCBmcm9tIHRo ZSAKPiBTb0MgYWZ0ZXIgYWxsLgoKTXkgbWFpbiByZWFzb24gd2FzIHRoYXQgSSBoYXZlIG5vIGNs dWUgd2hhdCBhIHJlYXNvbmFibGUgY29udHJvbGxlcgpmcmVxdWVuY3kgaXMuIFRoZSBkZWZhdWx0 IG9uIFRpZ2VyIG9uIGJvb3QgIGlzIDk5TUh6LCB3aGljaCBjYXVzZXMKcHJvYmxlbXMgd2l0aCBh Y2N1cmF0ZSByYXRlcy4KClNpbWlsYXJseSB0aGUgY29udHJvbGxlciBoYXMgaXNzdWVzIHdpdGgg bG93IGNsb2NrIHJhdGVzIChlcnJhdHVtIDUgaWYKSSdtIG5vdCBtaXN0YWtlbikgYW5kIHRoZXIg TWFyayB3cm90ZSB0aGF0IGF0IDMwME1IeiB0aGUgaXNzdWUgaXMgbGVzcwp2aXNpYmxlLiBTbyBJ IHRvb2sgdGhhdCBmcmVxdWVuY3ksIGJ1dCBoYXZlIG5vIGNsdWUgd2hhdCB0aGUgInJpZ2h0Igpm cmVxdWVuY3kgaXMuCgpTaW1pbGFybHksIG9ubHkgUmVuZXNhcyBzb2NzIHNlZW0gdG8gc2V0IHRo ZWlyIGNhbiBmcmVxdWVuY3kgaW4gdGhlIERUCmFuZCB0aGF0IHRvIDQwTUh6LgoKSW4gdGhlIFJv Y2tjaGlwIHZlbmRvci1rZXJuZWwgSSd2ZSBzZWVuIHJhdGVzIHRvIHNldCB0byAxNTBNSHosIDIw ME1Iegoob3IgbGVmdCBhbG9uZSkgb24gYSBib2FyZC1sZXZlbAoKcmszNTY4LW9rMzU2OGMuZHRz IGV2ZW4gc2V0cyBib3RoIDE1ME1IWiBBTkQgMjAwTUh6IGRlcGVuZGluZwpvbiB0aGUgQ0FOIGNv bnRyb2xsZXIgKDIwMCBmb3IgY2FuMCsxLCAxNTAgZm9yIGNhbjIpIC4KClRoaXMgZG9lcyBzdWdn ZXN0IHRoZSB1c2FibGUgZnJlcXVlbmN5IGJlaW5nIHNwZWNpZmljIHRvIHRoZSBib2FyZC1kZXNp Z24uCgoKPiBJZiBpdCBjYW5ub3QgYmUgcHV0IGludG8gcmszNTg4LWJhc2UuZHRzaSBmb3Igc29t ZSByZWFzb24gYW5kIGlzIAo+IHByb2R1Y3Qtc3BlY2lmaWMuLi4gV2h5IGlzIHRoaXMgaW4gdGhl IGJhc2Vib2FyZCBEVFMgYW5kIG5vdCBpbiB0aGUgU29NIAo+IERUU0k/IEkgd291bGQgbGlrZSB0 byBhdm9pZCBvdXIgY3VzdG9tZXJzIHRvIGhhdmUgdG8gY29weSB0aGluZ3Mgb3ZlciBpZiAKPiB0 aGV5IHNob3VsZCBqdXN0IHdvcmsgb24gdGhlaXIgYmFzZWJvYXJkIHRvbyBpZiB0aGV5IGRvbid0 IGRvIGNyYXp5IAo+IHRoaW5ncyB0aGVyZS4KCldlIGNhbiBvZiBjb3Vyc2UgbW92ZSB0aGUgY2xr LXJhdGUgdG8gdGhlIHRpZ2VyLmR0c2kuCihUaGlzIHNob3VsZCBub3QgYWZmZWN0IHRoZSByZXN0 IG9mIHRoZSBzZXJpZXMsIGFzIEknbGwgYmUgYXBwbHlpbmcgdGhlCmR0cyBwYXRjaGVzIGFueXdh eSkKCgpIZWlrbwoKCj4gSSdsbCB0cnkgdG8gZmluZCB0aW1lIHRvIHRlc3QgdGhlIHRocmVlIENB TiBjb250cm9sbGVycyBvbiBSSzM1ODggSmFndWFyIAo+IHdpdGggdGhlIENBTjEtQ0FOMi1VQVJU NCBNZXp6YW5pbmUgYWRhcHRlciBib2FyZCBhbmQgd2lsbCBjb250cmlidXRlIGFuIAo+IG92ZXJs YXkgZm9yIHRoYXQgaWYgaXQgZ29lcyB3ZWxsLiBJIGRvbid0IGhhdmUgYSBDQU4tRkQgYWRhcHRl ciB0aG91Z2ggCj4gYnV0IEkgaG9wZSB0aGV5IHJldXNlZCB0aGUgZXhhY3Qgc2FtZSBJUCBmb3Ig dGhlIHRocmVlIGNvbnRyb2xsZXJzIGluIAo+IHRoZSBTb0MgOikKCgoKCgpfX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpMaW51eC1yb2NrY2hpcCBtYWlsaW5n IGxpc3QKTGludXgtcm9ja2NoaXBAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5m cmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LXJvY2tjaGlwCg==