Re: [Xenomai-help] Atomic 64 bit write access on PCIe device

["M. Koehrer" <mathias_koehrer@domain.hid>]

Hi Stephane,

thanks for your mail.
> 
> I'm no expert, but did you tried already using FP instructions, which is
> a common
> trick to make use of 64 bits I/O in code optimization (before SIMD era).
> 
> How about the following:
> 
> void do_write64(void *p, unsigned long long x)
> {
>         volatile union {
>                 unsigned long long ull;
>                 double d;
>         } u;
> 
>         u.ull = x;
>         *(volatile double *)p = u.d;
> }
> 
> Disassemble that code, you should see some fldl and fstpl.

First I thought of using the FPU for this issue.
Hoever, I am not sure if it is allowed to use the FPU here as I think there are some 64 bit integer values
that will be modified by fldl (e.g. if they represent some kind of NaN).
According to Intel's instruction set reference for fld:

"Pushes the source operand onto the FPU register stack. The source operand can be in
single-precision, double-precision, or double extended-precision floating-point
format. If the source operand is in single-precision or double-precision floating-point
format, it is automatically converted to the double extended-precision floating-point
format before being pushed on the stack."

In my case I have a double precision which will be converted to the double extended-precision
format.
Thus, I can imagine that there are some 64 bit long longs that will not be handled correctly.


Regards

Mathias


-- 
Mathias Koehrer
mathias_koehrer@domain.hid


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