From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56FC7C433F5 for ; Fri, 10 Dec 2021 08:00:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1yxxVj6tkL93PpCEzuzd3NyP+qfQiccxaVTXsgRbkRA=; b=U8lQJd2jpdt8SO CSYmTfhdPmnnA+3VUZxHOvoi1f9kC9UCIxyibzLBD4p38Dk6i3QpM+Rs8ihB+Z0/JVh97JcJF7anc KoOE0VOgBEJ2d3/Gw37bGkTcaeGNZ9RwjP6nZG9rorifQp1xxG7eAjpfxoR3bX2K1uCTgivageaGv O5rSh34YJ3ALGaRrIZM5UUe9xh5mS9dBzBByh5+WQVfZ/DY8M/MXCw1y7U8MwaTym0/tYxvWUzyYe inrlTn6G0CFycuFKkpTqpml79k7Rniq9ke/C7ZOpJ9B/zpe94gmhv4JeaMBKvzsJMbvh04yH9Hqbe vNAppL6DWRI0glAz7SAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvao1-0017ps-FK; Fri, 10 Dec 2021 07:59:01 +0000 Received: from mx4.securetransport.de ([178.254.6.145]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvanw-0017oP-Ih for linux-arm-kernel@lists.infradead.org; Fri, 10 Dec 2021 07:58:58 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dh-electronics.com; s=dhelectronicscom; t=1639123107; bh=86DltGWZzRuYiYfPApQWN0FH6LdOSuEQRsAVcwvp5S8=; h=From:To:CC:Subject:Date:References:In-Reply-To:From; b=SGpPaG9QnoksAl0KHszIN56uOb9yxSlBiuWSx53KMHnq033LuaYZlDPJNKqNyGZu4 DoLnNcj07bUakWtlKkZg6wy1Cic7fglWKQ4sBGXgjPpuHN80OjYQ/Y+tLAelJ4AAbR IveshCq7w4KY77MESuSzpIeJpKJIFavdL6G9x+TQLoOxbhDRxE0ItG5XgneeXNj66E a//QDURlYRj3aLbAek/TA9YxgAdZWn2RhG0Hsh3HEckSufUIUNdaeYcvfeCy7RM7By TdYExbr1MBFOoiX5gPQyuKsrHIw9EcTznrJUuoXzNAZPJEej1aiArWPmhWn0WrkfYT 9TTZHOpX6KtNg== X-secureTransport-forwarded: yes From: Christoph Niedermaier Complaints-To: abuse@cubewerk.de To: "Marek MV. Vasut" , "linux-arm-kernel@lists.infradead.org" CC: Shawn Guo , Fabio Estevam , "NXP Linux Team" , kernel Subject: RE: [PATCH] ARM: dts: imx6qdl-dhcom: Add USB overcurrent pin on SoM layer Thread-Topic: [PATCH] ARM: dts: imx6qdl-dhcom: Add USB overcurrent pin on SoM layer Thread-Index: AQHX7EaK1KK+ea/u1U+GNWWVPdOK66wpPJgAgACYmYCAANkYgIAAqR8Q Date: Fri, 10 Dec 2021 07:58:15 +0000 Message-ID: <328c8b19f2ae43a89a7db4b1a13ff7f5@dh-electronics.com> References: <20211208151504.10758-1-cniedermaier@dh-electronics.com> <07f9d418afb34494ad78ed5c903930da@dh-electronics.com> In-Reply-To: Accept-Language: de-DE, en-US Content-Language: de-DE X-MS-Has-Attach: X-MS-TNEF-Correlator: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211209_235857_060617_0D6A215E X-CRM114-Status: GOOD ( 26.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Marek Vasut [mailto:marex@denx.de] Sent: Thursday, December 9, 2021 11:26 PM > On 12/9/21 10:54, Christoph Niedermaier wrote: >> From: Marek Vasut >> Sent: Thursday, December 9, 2021 1:23 AM >>> >>> On 12/8/21 16:15, Christoph Niedermaier wrote: >>>> Add USB overcurrent pin muxing on SoM layer, but disable it >>>> by default. If a board has connected this pin like the >>>> picoITX, this property should be removed in the board file. >>>> >>>> Signed-off-by: Christoph Niedermaier >>>> Cc: Shawn Guo >>>> Cc: Fabio Estevam >>>> Cc: Marek Vasut >>>> Cc: NXP Linux Team >>>> Cc: kernel@dh-electronics.com >>>> To: linux-arm-kernel@lists.infradead.org >>>> --- >>>> arch/arm/boot/dts/imx6qdl-dhcom-picoitx.dtsi | 4 ++++ >>>> arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi | 2 ++ >>>> 2 files changed, 6 insertions(+) >>>> >>>> diff --git a/arch/arm/boot/dts/imx6qdl-dhcom-picoitx.dtsi b/arch/arm/boot/dts/imx6qdl-dhcom-picoitx.dtsi >>>> index 4cd4cb9543c8..a67682bfe7bd 100644 >>>> --- a/arch/arm/boot/dts/imx6qdl-dhcom-picoitx.dtsi >>>> +++ b/arch/arm/boot/dts/imx6qdl-dhcom-picoitx.dtsi >>>> @@ -48,6 +48,10 @@ >>>> "", "", "", "", "", "", "", ""; >>>> }; >>>> >>>> +&usbh1 { /* USB overcurrent pin is connected */ >>>> + /delete-property/ disable-over-current; >>>> +}; >>>> + >>>> &iomuxc { >>>> pinctrl-0 = < >>>> /* >>>> diff --git a/arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi b/arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi >>>> index 5d10c40313cb..e4fdce016c34 100644 >>>> --- a/arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi >>>> +++ b/arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi >>>> @@ -385,6 +385,7 @@ >>>> }; >>>> >>>> &usbh1 { >>>> + disable-over-current; >>>> dr_mode = "host"; >>>> pinctrl-0 = <&pinctrl_usbh1>; >>>> pinctrl-names = "default"; >>>> @@ -728,6 +729,7 @@ >>>> pinctrl_usbh1: usbh1-grp { >>>> fsl,pins = < >>>> MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x120b0 >>>> + MX6QDL_PAD_EIM_D30__USB_H1_OC 0x1b0b1 >>>> >; >>>> }; >>> >>> Shouldn't this be the other way around -- boards with unused USB >>> overcurrent detection should disable it ? In this case, PDK2 and DRC02 >>> should add the 'disable-over-current' DT property and pinmux, while >>> picoitx should add the USB OC pinmux . >> >> This pin is defined by the DHCOM standard, therefore no other function >> can be used on this pin. That is why it should be configured in the SoM >> file. > > Then the pinmux in the SoM dtsi is OK. > >> The first internal version was the other way around, but then we had a >> discussion about accidentally enabling the overcurrent detection, because >> it is enabled by default. Since most customers do not use overcurrent >> detection, we have decided to disable it by default. So if a customer >> uses that pin, he has to actively remove the DT property as for example >> shown in the PicoITX board file. In this way, the source of issues should >> be reduced. > > It seems to me that if the SoM has a dedicated pin for USB OC, then the > SoM dtsi should keep the default configuration of USB OC (i.e. enabled). > If a board does not use the USB OC (e.g. because there is a USB hub on > it), then the board should add the 'disable-over-current' property, > because this is clearly a board property, not a SoM property. > > Besides, on systems without a USB hub, you likely want to make sure the > OC detection is not accidentally forgotten disabled, as that might lead > to damage to the port. > > So I would say, keep the pinmux settings in the SoM dtsi, and add > disable-over-current property on board level dts. I am with you, it is a board property. But I don't want to enable it by default, because here I rate the accidental damage of the port higher. So if you need it you can enable it on board layer. Because of the negative logic have to do it this way. What is the argument against it? Regards Christoph _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel