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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: John.C.Harrison@Intel.com, Intel-GFX@Lists.FreeDesktop.Org
Subject: Re: [PATCH 2/4] drm/i915: Support whitelist workarounds on all engines
Date: Tue, 18 Jun 2019 07:29:01 +0100	[thread overview]
Message-ID: <32d7e660-26e4-e4b9-3de4-bee49ed0675b@linux.intel.com> (raw)
In-Reply-To: <20190618010108.27499-3-John.C.Harrison@Intel.com>


On 18/06/2019 02:01, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> Newer hardware requires setting up whitelists on engines other than
> render. So, extend the whitelist code to support all engines.
> 
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Signed-off-by: Robert M. Fosha <robert.m.fosha@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/gt/intel_workarounds.c | 66 +++++++++++++++------
>   1 file changed, 47 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index ae82340fff45..5308a0864e78 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1043,48 +1043,79 @@ static void gen9_whitelist_build(struct i915_wa_list *w)
>   	whitelist_reg(w, GEN8_HDC_CHICKEN1);
>   }
>   
> -static void skl_whitelist_build(struct i915_wa_list *w)
> +static void skl_whitelist_build(struct intel_engine_cs *engine)
>   {
> +	struct i915_wa_list *w = &engine->whitelist;
> +
> +	if (engine->class != RENDER_CLASS)
> +		return;
> +
>   	gen9_whitelist_build(w);
>   
>   	/* WaDisableLSQCROPERFforOCL:skl */
>   	whitelist_reg(w, GEN8_L3SQCREG4);
>   }
>   
> -static void bxt_whitelist_build(struct i915_wa_list *w)
> +static void bxt_whitelist_build(struct intel_engine_cs *engine)
>   {
> -	gen9_whitelist_build(w);
> +	if (engine->class != RENDER_CLASS)
> +		return;
> +
> +	gen9_whitelist_build(&engine->whitelist);
>   }
>   
> -static void kbl_whitelist_build(struct i915_wa_list *w)
> +static void kbl_whitelist_build(struct intel_engine_cs *engine)
>   {
> +	struct i915_wa_list *w = &engine->whitelist;
> +
> +	if (engine->class != RENDER_CLASS)
> +		return;
> +
>   	gen9_whitelist_build(w);
>   
>   	/* WaDisableLSQCROPERFforOCL:kbl */
>   	whitelist_reg(w, GEN8_L3SQCREG4);
>   }
>   
> -static void glk_whitelist_build(struct i915_wa_list *w)
> +static void glk_whitelist_build(struct intel_engine_cs *engine)
>   {
> +	struct i915_wa_list *w = &engine->whitelist;
> +
> +	if (engine->class != RENDER_CLASS)
> +		return;
> +
>   	gen9_whitelist_build(w);
>   
>   	/* WA #0862: Userspace has to set "Barrier Mode" to avoid hangs. */
>   	whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
>   }
>   
> -static void cfl_whitelist_build(struct i915_wa_list *w)
> +static void cfl_whitelist_build(struct intel_engine_cs *engine)
>   {
> -	gen9_whitelist_build(w);
> +	if (engine->class != RENDER_CLASS)
> +		return;
> +
> +	gen9_whitelist_build(&engine->whitelist);
>   }
>   
> -static void cnl_whitelist_build(struct i915_wa_list *w)
> +static void cnl_whitelist_build(struct intel_engine_cs *engine)
>   {
> +	struct i915_wa_list *w = &engine->whitelist;
> +
> +	if (engine->class != RENDER_CLASS)
> +		return;
> +
>   	/* WaEnablePreemptionGranularityControlByUMD:cnl */
>   	whitelist_reg(w, GEN8_CS_CHICKEN1);
>   }
>   
> -static void icl_whitelist_build(struct i915_wa_list *w)
> +static void icl_whitelist_build(struct intel_engine_cs *engine)
>   {
> +	struct i915_wa_list *w = &engine->whitelist;
> +
> +	if (engine->class != RENDER_CLASS)
> +		return;
> +
>   	/* WaAllowUMDToModifyHalfSliceChicken7:icl */
>   	whitelist_reg(w, GEN9_HALF_SLICE_CHICKEN7);
>   
> @@ -1100,25 +1131,22 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
>   	struct drm_i915_private *i915 = engine->i915;
>   	struct i915_wa_list *w = &engine->whitelist;
>   
> -	if (engine->class != RENDER_CLASS)
> -		return;
> -
>   	wa_init_start(w, "whitelist");
>   
>   	if (IS_GEN(i915, 11))
> -		icl_whitelist_build(w);
> +		icl_whitelist_build(engine);
>   	else if (IS_CANNONLAKE(i915))
> -		cnl_whitelist_build(w);
> +		cnl_whitelist_build(engine);
>   	else if (IS_COFFEELAKE(i915))
> -		cfl_whitelist_build(w);
> +		cfl_whitelist_build(engine);
>   	else if (IS_GEMINILAKE(i915))
> -		glk_whitelist_build(w);
> +		glk_whitelist_build(engine);
>   	else if (IS_KABYLAKE(i915))
> -		kbl_whitelist_build(w);
> +		kbl_whitelist_build(engine);
>   	else if (IS_BROXTON(i915))
> -		bxt_whitelist_build(w);
> +		bxt_whitelist_build(engine);
>   	else if (IS_SKYLAKE(i915))
> -		skl_whitelist_build(w);
> +		skl_whitelist_build(engine);
>   	else if (INTEL_GEN(i915) <= 8)
>   		return;
>   	else
> 

 From last round:

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-06-18  6:29 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-18  1:01 [PATCH 0/4] Update whitelist support for new hardware John.C.Harrison
2019-06-18  1:01 ` [PATCH 1/4] drm/i915: Support flags in whitlist WAs John.C.Harrison
2019-06-18  6:27   ` Tvrtko Ursulin
2019-06-18  6:35   ` Tvrtko Ursulin
2019-06-18 13:48     ` John Harrison
2019-06-18 16:10   ` Tvrtko Ursulin
2019-06-18  1:01 ` [PATCH 2/4] drm/i915: Support whitelist workarounds on all engines John.C.Harrison
2019-06-18  6:29   ` Tvrtko Ursulin [this message]
2019-06-18  1:01 ` [PATCH 3/4] drm/i915: Add whitelist workarounds for ICL John.C.Harrison
2019-06-18  6:30   ` Tvrtko Ursulin
2019-06-18  1:01 ` [PATCH 4/4] drm/i915: Update workarounds selftest for read only regs John.C.Harrison
2019-06-18  6:42   ` Tvrtko Ursulin
2019-06-18 13:43     ` John Harrison
2019-06-18 16:14       ` Tvrtko Ursulin
2019-06-18  1:50 ` ✓ Fi.CI.BAT: success for Update whitelist support for new hardware (rev2) Patchwork
2019-06-18 16:33   ` Tvrtko Ursulin
2019-06-18 19:54     ` [PATCH] drm/i915: Implement read-only support in whitelist selftest John.C.Harrison
2019-06-18 20:08       ` John Harrison
2019-06-19  6:41         ` Tvrtko Ursulin
2019-06-19  6:49       ` Tvrtko Ursulin
2019-06-20 15:43       ` Tvrtko Ursulin
2019-06-25  8:33         ` Tvrtko Ursulin
2019-07-03  2:20           ` John Harrison
2019-06-18 20:51     ` ✗ Fi.CI.BAT: failure for " Patchwork
2019-06-18 16:22 ` ✓ Fi.CI.IGT: success for Update whitelist support for new hardware (rev2) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2019-06-14  0:28 [PATCH 0/4] Update whitelist support for new hardware Robert M. Fosha
2019-06-14  0:28 ` [PATCH 2/4] drm/i915: Support whitelist workarounds on all engines Robert M. Fosha
2019-06-14  6:50   ` Tvrtko Ursulin

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