From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: irenic.rajneesh@gmail.com, srinivas.pandruvada@linux.intel.com,
xi.pardee@linux.intel.com, Hans de Goede <hansg@kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
platform-driver-x86@vger.kernel.org
Subject: Re: [PATCH V2 07/17] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description
Date: Tue, 7 Apr 2026 15:16:14 +0300 (EEST) [thread overview]
Message-ID: <3319ff60-39d2-2b4f-9b9d-4f0e1fbcb88b@linux.intel.com> (raw)
In-Reply-To: <20260325014819.1283566-8-david.e.box@linux.intel.com>
[-- Attachment #1: Type: text/plain, Size: 1233 bytes --]
On Tue, 24 Mar 2026, David E. Box wrote:
> Add a proper description for the intel_pmc_ssram driver.
>
> Signed-off-by: David E. Box <david.e.box@linux.intel.com>
> ---
>
> V2 - No changes
>
> drivers/platform/x86/intel/pmc/Kconfig | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/intel/pmc/Kconfig
> index c6ef0bcf76af..0f19dc7edcf9 100644
> --- a/drivers/platform/x86/intel/pmc/Kconfig
> +++ b/drivers/platform/x86/intel/pmc/Kconfig
> @@ -28,3 +28,14 @@ config INTEL_PMC_CORE
>
> config INTEL_PMC_SSRAM_TELEMETRY
> tristate
> + help
> + This PCI driver discovers PMC SSRAM telemetry regions through the
> + PMC's MMIO interface and registers them with the Intel VSEC framework
> + as Intel PMT telemetry devices.
> +
> + It probes the PMC SSRAM device, extracts DVSEC information from MMIO,
> + reads device IDs and base addresses for multiple PMCs (main, IOE, PCH),
> + and exposes the discovered telemetry through Intel PMT interfaces
> + (including sysfs).
> +
> + This option is selected by INTEL_PMC_CORE.
>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
--
i.
next prev parent reply other threads:[~2026-04-07 12:16 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-25 1:48 [PATCH V2 00/17] Add ACPI-based PMT discovery support for Intel PMC David E. Box
2026-03-25 1:48 ` [PATCH V2 01/17] platform/x86/intel/pmt: Add pre/post decode hooks around header parsing David E. Box
2026-03-25 1:48 ` [PATCH V2 02/17] platform/x86/intel/pmt/crashlog: Split init into pre-decode David E. Box
2026-03-25 1:48 ` [PATCH V2 03/17] platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook David E. Box
2026-04-07 11:05 ` Ilpo Järvinen
2026-03-25 1:48 ` [PATCH V2 04/17] platform/x86/intel/pmt: Move header decode into common helper David E. Box
2026-04-07 11:05 ` Ilpo Järvinen
2026-03-25 1:48 ` [PATCH V2 05/17] platform/x86/intel/pmt: Pass discovery index instead of resource David E. Box
2026-04-07 11:07 ` Ilpo Järvinen
2026-03-25 1:48 ` [PATCH V2 06/17] platform/x86/intel/pmt: Unify header fetch and add ACPI source David E. Box
2026-04-07 12:14 ` Ilpo Järvinen
2026-03-25 1:48 ` [PATCH V2 07/17] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description David E. Box
2026-04-07 12:16 ` Ilpo Järvinen [this message]
2026-03-25 1:48 ` [PATCH V2 08/17] platform/x86/intel/pmc: Add ACPI PWRM telemetry driver for Nova Lake S David E. Box
2026-04-07 12:56 ` Ilpo Järvinen
2026-03-25 1:48 ` [PATCH V2 09/17] platform/x86/intel/pmc/ssram: Rename probe and PCI ID table for consistency David E. Box
2026-03-25 1:48 ` [PATCH V2 10/17] platform/x86/intel/pmc/ssram: Use fixed-size static pmc array David E. Box
2026-04-07 13:08 ` Ilpo Järvinen
2026-03-25 1:48 ` [PATCH V2 11/17] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper David E. Box
2026-04-07 13:18 ` Ilpo Järvinen
2026-03-25 1:48 ` [PATCH V2 12/17] platform/x86/intel/pmc/ssram: Add PCI platform data David E. Box
2026-03-25 1:48 ` [PATCH V2 13/17] platform/x86/intel/pmc/ssram: Refactor memory barrier for reentrant probe David E. Box
2026-03-25 1:48 ` [PATCH V2 14/17] platform/x86/intel/pmc/ssram_telemetry: Fix cleanup pattern for __free() variables David E. Box
2026-04-07 13:33 ` Ilpo Järvinen
2026-04-17 22:28 ` David Box
2026-03-25 1:48 ` [PATCH V2 15/17] platform/x86/intel/pmc/ssram: Add ACPI discovery scaffolding David E. Box
2026-03-25 1:48 ` [PATCH V2 16/17] platform/x86/intel/pmc/ssram: Make PMT registration optional David E. Box
2026-03-25 1:48 ` [PATCH V2 17/17] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery David E. Box
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3319ff60-39d2-2b4f-9b9d-4f0e1fbcb88b@linux.intel.com \
--to=ilpo.jarvinen@linux.intel.com \
--cc=david.e.box@linux.intel.com \
--cc=hansg@kernel.org \
--cc=irenic.rajneesh@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=platform-driver-x86@vger.kernel.org \
--cc=srinivas.pandruvada@linux.intel.com \
--cc=xi.pardee@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.