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From: Christian Schoenebeck <qemu_oss@crudebyte.com>
To: virtio-comment@lists.oasis-open.org
Cc: Cornelia Huck <cohuck@redhat.com>,
	Stefan Hajnoczi <stefanha@redhat.com>, Greg Kurz <groug@kaod.org>,
	Dominique Martinet <asmadeus@codewreck.org>,
	"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [virtio-comment] [PATCH v2 0/4] Add VIRTIO_RING_F_INDIRECT_SIZE and queue_indirect_size
Date: Wed, 09 Mar 2022 15:58:56 +0100	[thread overview]
Message-ID: <3382929.hzA3DnVQDd@silver> (raw)
In-Reply-To: <2255414.aXzeqRvSCW@silver>

On Montag, 21. Februar 2022 17:22:18 CET Christian Schoenebeck wrote:
> This is a follow-up of:
> [1/2]:
> https://lists.oasis-open.org/archives/virtio-comment/202112/msg00034.html
> [2/2]:
> https://lists.oasis-open.org/archives/virtio-comment/202112/msg00035.html
> 
> These 4 patches introduce a more fine graded control over the maximum length
> of indirect descriptor tables.
> 
> Associated Github Task:
> https://github.com/oasis-tcs/virtio-spec/issues/122
> 
> Latest Version (all patches):
> https://github.com/cschoenebeck/virtio-spec/commits/long_indirect_descr

Ping.

Best regards,
Christian Schoenebeck

> v1 -> v2:
> 
>   * Update reserved bits section [patch 1].
> 
>   * Add requirement to device normative section [patch 1].
> 
>   * Use the general new term "Queue Indirect Size" where possible instead of
> mentioning a bus specific field name [patch 1].
> 
>   * Simplified phrasing of requirements in split ring section [patch 1].
> 
>   * Move bus-independent changes from patch 2 to patch 1.
> 
>   * There is only one indirect descriptor table allowed per buffer
>     (round-trip message), so use the term "per indirect descriptor table"
> for the semantic of "Queue Indirect Size" in patch 2.
> 
>   * Simplify phrasing of requirements in patch 2.
> 
>   * MMIO: First shot [NEW patch 3].
> 
>   * CCW: First shot [NEW patch 4].
> 
> Christian Schoenebeck (4):
>   Add VIRTIO_RING_F_INDIRECT_SIZE
>   Add PCI configuration field "queue_indirect_size"
>   Add MMIO configuration register "QueueIndirectNum"
>   Add CCW configuration field "indirect_num" to vq_info_block
> 
>  content.tex     | 77 ++++++++++++++++++++++++++++++++++++++++++++++---
>  packed-ring.tex |  2 +-
>  split-ring.tex  |  8 +++--
>  3 files changed, 80 insertions(+), 7 deletions(-)





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  parent reply	other threads:[~2022-03-09 14:59 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-21 16:22 [virtio-comment] [PATCH v2 0/4] Add VIRTIO_RING_F_INDIRECT_SIZE and queue_indirect_size Christian Schoenebeck
2022-02-21 16:25 ` [virtio-comment] [PATCH v2 1/4] Add VIRTIO_RING_F_INDIRECT_SIZE Christian Schoenebeck
2022-03-10 14:57   ` Stefan Hajnoczi
2022-03-10 16:20     ` Christian Schoenebeck
2022-02-21 16:27 ` [PATCH v2 2/4] Add PCI configuration field "queue_indirect_size" Christian Schoenebeck
2022-03-10 15:04   ` [virtio-comment] " Stefan Hajnoczi
2022-02-21 16:58 ` [PATCH v2 3/4] Add MMIO configuration register "QueueIndirectNum" Christian Schoenebeck
2022-03-10 15:23   ` Stefan Hajnoczi
2022-02-21 17:01 ` [PATCH v2 4/4] Add CCW configuration field "indirect_num" to vq_info_block Christian Schoenebeck
2022-03-10 15:26   ` Stefan Hajnoczi
2022-03-10 16:09     ` [virtio-comment] " Cornelia Huck
2022-03-11  8:53       ` Christian Schoenebeck
2022-03-11  9:21         ` [virtio-comment] " Cornelia Huck
2022-03-11 11:15           ` Halil Pasic
2022-03-11 12:09             ` [virtio-comment] " Christian Schoenebeck
2022-03-10 16:09     ` Christian Schoenebeck
2022-03-09 14:58 ` Christian Schoenebeck [this message]
2022-03-10 15:35   ` [virtio-comment] [PATCH v2 0/4] Add VIRTIO_RING_F_INDIRECT_SIZE and queue_indirect_size Stefan Hajnoczi

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