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Mon, 24 Feb 2025 09:54:58 +0100 Message-ID: <3382d476-c1b3-461a-b8f0-c47cccb6899d@gmx.de> Date: Mon, 24 Feb 2025 09:54:56 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 09/17] spl: riscv: opensbi: Error on misaligned FDT To: Sam Edwards Cc: Marek Vasut , Sumit Garg , Peter Robinson , Richard Henderson , u-boot@lists.denx.de, Tom Rini , Ilias Apalodimas , Simon Glass , Bin Meng , Leo Yu-Chi Liang , Rick Chen References: <20250224055524.1334929-1-CFSworks@gmail.com> <20250224055524.1334929-10-CFSworks@gmail.com> Content-Language: en-US From: Heinrich Schuchardt In-Reply-To: <20250224055524.1334929-10-CFSworks@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:O2kl+oCwllF+6T+KvZGCaeDI4laDYal4tTyW9lpjWXIraLD9t1R It+VouSsm4L/9snw138352Tn5Q1yGPEDvhJa0eaqb4GWQxAfYeXxakWQuXaTbYHvOOPC+sm FM4RXpQW+zm7ZSejhImd7K1e/wubVUXYGhytCkjYUkxFyLynWC3GQKASsiLEY05CuC2BPGd /JJBhd6q6r4MCalT5Y7Bg== UI-OutboundReport: notjunk:1;M01:P0:XfQMf55iW9Q=;Eu/xfKgZpmB1wHDZtzuTeZlw3gx bpAkf/EwHo41zvZtTS3uNASgWWTjsILup2xFeJNXJEM86UVSF7J0IR9ect2my0X8NEeKUIq4H +FZSifvKZznYBsrDqelZesZMGzMchZ8jW1Ftser+Vya2A2gNgmZrGD0SFMYFCGkeX4U7R4fnz F0r5cq0ZSI2BEpGxkTSms8EB6foUs76NfxtD4wl7L72eEyG93VYTVcOY1jHMm6XvIveVnrhn5 YQ65cPbF5Zp8EFMbBCk179jDPGE8w+vEDOo4gliNtI78QSLrRxQqtvMvYW6xvSFYHndTD/tZo BWcoDsW58y3pCAxQWFRIPZmJf6z2L1QJe1Pp4gzUeBD7BYFQID83psaGRZEaI7vQa2TBz+IVY lEAze5UBPe6yoTg8+1XbJVOZkH/G44fiTNEPJ5xnsVlDB8PwjPCn4Xov9MSFvT36QyAfoCYfz vD++1GJLtW9b70Khe0VdKxVyepAmMRItl31USkVD4FPzWUdxyN5OhJaEWZgTmlr9MixBcIJEJ OsiyDFhlgWZlHu3dIeuhfoYfVMGKlbOljuK0OKImfHcgoLW9sRDOMFXQvQXkYvABMxN1gKs8b bNgpxYO7eWpWuyV7Lr96XNppa6S7NyAcWy7sfcxaar61G0gwgoHOoCUGxEBgICHB/w3aJN0Di HNS90EEjeE9PzRcBG30wSWe2CP7JvennhyKvmY5EdoMi7Z6VfgMctRvVDg0RJopZYaR1jZjAo jIgnyIHgAq682cKlIPF1hyznhbtC/8UYRZ/R5XMTmAtnULBf9e0OfH3QJyEGx1J7EWBgyQ2q2 ErgkvhcZY0xOP5DAIqrQYxNpaybNVIZu2zsCfiY5NyS2lsb0tindyNk0PDVJD/tDsBXoObwwd nyb592sDO5x+wcgQ4Go89hMSn6BKV3sceyrsI+5K/SRc+NCXsYlzCRqiJV5QForJISKL+o0IR qTG0FMh6G3Ii9dXkhwE0YJiN5js68f7HV79JuiHT6zkKMHNZ2Q4W1eKYE+8e/4sgMqV64A9Na 4/wI4AKaPOYxUxb2V4CmrhZmA7I8GBDeRpIU5O/d18v1TYn1MqF1vd6VPzDJZoL8eCMGBps0C uc5vKcVBv+D4Cr7nVX+jvohwLQga4wFedILr6/OzNjbgvaNfsR3DaF4kDV7MvTc9CN+8X/oFL DFxa+l7pRJtkmlMxkhybNqCFlVmjPSzDlc4wYqwsK0uWCboTKtwI2qW8+HnrgpUXx+e2Sd/KC KcQGdeKeAIwcf172eGbt/mpUKIp3FCO/W62WoQpCBDzrrL1xhLSK2R9X6UVpU84ggGlwkC7U+ exVthN66zvHKByXoy6yYwwps6ftcow/miBdb6WbfxacVlDbiOugUMkhosZzgvI6C9TMtxTqxg 7xgGRE9ixMVEnGk3uXk9LZlYZj3yAPEQkeQgUk/y9wRWeAhTViC35/2vsE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 2/24/25 06:55, Sam Edwards wrote: > libfdt 1.6.1+ requires the FDT to be 8-byte aligned and returns an error > if not. OpenSBI 1.0+ includes this version of libfdt and will also > reject misaligned FDTs. > > However, OpenSBI cannot indicate the error to the user: since it cannot > access the serial console, it can only silently hang. This can be very > difficult to diagnose without proper debugging facilities. Therefore, > give the U-Boot SPL, which *can* print error messages, an additional > check for proper FDT alignment. > > Signed-off-by: Sam Edwards > --- > common/spl/spl_opensbi.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c > index 5a26d7c31a4..0ed6afeacc6 100644 > --- a/common/spl/spl_opensbi.c > +++ b/common/spl/spl_opensbi.c > @@ -57,6 +57,11 @@ void __noreturn spl_invoke_opensbi(struct spl_image_i= nfo *spl_image) > hang(); > } > > + if (!IS_ALIGNED((uintptr_t)spl_image->fdt_addr, 8)) { > + pr_err("SPL image loaded an improperly-aligned device tree\n"); We only use pr_err() in drivers when we copy code from Linux. Otherwise use log_err(). As this code is for RISC-V, this patch should have been sent to the RISC-V maintainers. cc: Leo, Rick SPL size is very restricted on boards where it is responsible for initializing DRAM and therefore has to fit into cache. We should only add code that is strictly needed to SPL. What makes you think that this problem can realistically occur? Best regards Heinrich > + hang(); > + } > + > /* > * Originally, u-boot-spl will place DTB directly after the kernel, > * but the size of the kernel did not include the BSS section, which