From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Jinoh Kang" <jinoh.kang.kr@gmail.com>,
"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>,
Xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH 3/3] x86: Fix calculation of %dr6/dr7 reserved bits
Date: Tue, 29 Aug 2023 15:29:00 +0100 [thread overview]
Message-ID: <339df064-0ee7-2b2b-ba73-4528cc2b0b00@citrix.com> (raw)
In-Reply-To: <f5e258e1-5517-2276-6497-4288192cfeaa@suse.com>
On 29/08/2023 3:21 pm, Jan Beulich wrote:
> On 29.08.2023 15:43, Andrew Cooper wrote:
>> --- a/xen/arch/x86/include/asm/debugreg.h
>> +++ b/xen/arch/x86/include/asm/debugreg.h
>> @@ -1,6 +1,7 @@
>> #ifndef _X86_DEBUGREG_H
>> #define _X86_DEBUGREG_H
>>
>> +#include <asm/x86-defns.h>
>>
>> /* Indicate the register numbers for a number of the specific
>> debug registers. Registers 0-3 contain the addresses we wish to trap on */
>> @@ -21,7 +22,6 @@
>> #define DR_STEP (0x4000) /* single-step */
>> #define DR_SWITCH (0x8000) /* task switch */
>> #define DR_NOT_RTM (0x10000) /* clear: #BP inside RTM region */
>> -#define DR_STATUS_RESERVED_ZERO (~0xffffefffUL) /* Reserved, read as zero */
> As you're dropping constants from here, how about the others? Especially
> DR_NOT_RTM would be nice to go away as well (I don't really like its name),
> yet DR_SWITCH looks to also be unused.
That's dealt with later in the series. None of these DR_* constants
survive, but I think it's better to leave deleting them to the patch
that converts all.
>
>> --- a/xen/arch/x86/include/asm/x86-defns.h
>> +++ b/xen/arch/x86/include/asm/x86-defns.h
>> @@ -102,13 +102,30 @@
>>
>> /*
>> * Debug status flags in DR6.
>> + *
>> + * For backwards compatibility, status flags which overlap with
>> + * X86_DR6_DEFAULT have inverted polarity.
>> */
>> -#define X86_DR6_DEFAULT 0xffff0ff0 /* Default %dr6 value. */
>> +#define X86_DR6_B0 (_AC(1, UL) << 0) /* Breakpoint 0 */
>> +#define X86_DR6_B1 (_AC(1, UL) << 1) /* Breakpoint 1 */
>> +#define X86_DR6_B2 (_AC(1, UL) << 2) /* Breakpoint 2 */
>> +#define X86_DR6_B3 (_AC(1, UL) << 3) /* Breakpoint 3 */
>> +#define X86_DR6_BLD (_AC(1, UL) << 11) /* BusLock detect (INV) */
>> +#define X86_DR6_BD (_AC(1, UL) << 13) /* %dr access */
>> +#define X86_DR6_BS (_AC(1, UL) << 14) /* Single step */
>> +#define X86_DR6_BT (_AC(1, UL) << 15) /* Task switch */
>> +#define X86_DR6_RTM (_AC(1, UL) << 16) /* #DB/#BP in RTM region (INV) */
>> +
>> +#define X86_DR6_ZEROS _AC(0x00010000, UL) /* %dr6 bits forced to 0 */
> 0x00001000?
Bah yes - serves me right for a last minute refactor.
~Andrew
next prev parent reply other threads:[~2023-08-29 14:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-29 13:43 [PATCH 0/3] x86: Debug Regs fixes, part 1 Andrew Cooper
2023-08-29 13:43 ` [PATCH 1/3] x86: Reject bad %dr6/%dr7 values when loading guest state Andrew Cooper
2023-08-29 14:08 ` Jan Beulich
2023-08-30 14:35 ` Andrew Cooper
2023-08-30 15:12 ` Jan Beulich
2023-08-30 15:28 ` Andrew Cooper
2023-08-30 16:13 ` Jan Beulich
2023-08-30 17:02 ` Andrew Cooper
2023-08-31 6:08 ` Jan Beulich
2023-08-30 6:46 ` Jan Beulich
2023-08-30 14:39 ` Andrew Cooper
2023-08-29 13:43 ` [PATCH 2/3] x86: Introduce new debug.c for debug register infrastructure Andrew Cooper
2023-08-29 14:10 ` Jan Beulich
2023-08-29 14:25 ` Andrew Cooper
2023-08-29 13:43 ` [PATCH 3/3] x86: Fix calculation of %dr6/dr7 reserved bits Andrew Cooper
2023-08-29 14:21 ` Jan Beulich
2023-08-29 14:29 ` Andrew Cooper [this message]
2023-08-29 15:47 ` Jan Beulich
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