Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for SAGV support for Gen12+ (rev18)

["Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>]

Seems to be some issue in lmem self tests: :<4> [342.485150] intel_pstate: Turbo disabled by BIOS or unavailable on processor.
This is not related to SAGV.

Best Regards,

Lisovskiy Stanislav

Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo

________________________________________
From: Patchwork <patchwork@emeril.freedesktop.org>
Sent: Friday, April 10, 2020 4:20:58 PM
To: Lisovskiy, Stanislav
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for SAGV support for Gen12+ (rev18)

== Series Details ==

Series: SAGV support for Gen12+ (rev18)
URL   : https://patchwork.freedesktop.org/series/75129/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_8289 -> Patchwork_17276
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_17276 absolutely need to be
  verified manually.

  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_17276, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17276/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_17276:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@execlists:
    - fi-skl-lmem:        [PASS][1] -> [DMESG-WARN][2] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8289/fi-skl-lmem/igt@i915_selftest@live@execlists.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17276/fi-skl-lmem/igt@i915_selftest@live@execlists.html


Known issues
------------

  Here are the changes found in Patchwork_17276 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank:
    - fi-skl-lmem:        [DMESG-WARN][3] -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8289/fi-skl-lmem/igt@kms_flip@basic-flip-vs-wf_vblank.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17276/fi-skl-lmem/igt@kms_flip@basic-flip-vs-wf_vblank.html


#### Warnings ####

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [FAIL][5] ([i915#62] / [i915#95]) -> [SKIP][6] ([fdo#109271])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8289/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17276/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html


  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (52 -> 47)
------------------------------

  Additional (1): fi-kbl-7560u
  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_8289 -> Patchwork_17276

  CI-20190529: 20190529
  CI_DRM_8289: 81e3d7ff72672b6aeadbf9c0b9cc514cec9c889d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5586: 29fad328e6a1b105c8d688cafe19b1b5c19ad0c8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_17276: d05fb4a0457b591b3f67b57bd9f5786c4efe4add @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d05fb4a0457b drm/i915: Enable SAGV support for Gen12
08b2bfe6c74c drm/i915: Restrict qgv points which don't have enough bandwidth.
e1d400340158 drm/i915: Rename bw_state to new_bw_state
d7dfb591ab1a drm/i915: Added required new PCode commands
86c74315ca04 drm/i915: Add TGL+ SAGV support
1d27dc3371c2 drm/i915: Separate icl and skl SAGV checking
3d65a6833e4d drm/i915: Use bw state for per crtc SAGV evaluation
b7dc3af9b55a drm/i915: Add pre/post plane updates for SAGV
340b37dd96c3 drm/i915: Prepare to extract gen specific functions from intel_can_enable_sagv
5f292c54ef03 drm/i915: Add intel_atomic_get_bw_*_state helpers
b247b1150e51 drm/i915: Introduce skl_plane_wm_level accessor.
dd9d5971ba9b drm/i915: Eliminate magic numbers "0" and "1" from color plane
e1a65ab6533f drm/i915: Start passing latency as parameter

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17276/index.html
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