From: Thomas Monjalon <thomas.monjalon-pdR9zngts4EAvxtiuMwx3w@public.gmane.org>
To: Dmitry Vyal <dmitryvyal-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: "dev-VfR2kkLFssw@public.gmane.org" <dev-VfR2kkLFssw@public.gmane.org>
Subject: Re: Sporadic errors while initializing NICs in example applications, dpdk-1.5.0r1
Date: Fri, 29 Nov 2013 13:25:43 +0100 [thread overview]
Message-ID: <3439195.NJQbpGS54N@x220> (raw)
In-Reply-To: <52987236.3020707-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
29/11/2013 14:53, Dmitry Vyal :
> On 11/28/2013 03:01 PM, Richardson, Bruce wrote:
> >> It's probably due to a frequency scaling.
> >> The timer based is initialized when DPDK initialize and the CPU can
> >> change
> >> its frequency, breaking next timers.
> >>
> >> The fix is to control the CPU frequency.
> >>
> >> Please try this, without your patch:
> >> for g in /sys/devices/system/cpu/*/cpufreq/scaling_governor; do
> >>
> >> echo performance >$g; done The right fix for applications (examples and
> >> testpmd included) could be to call rte_power_init(). Patches are
> >> welcomed.
> >
> > [BR] Frequency changes should not affect timers for modern Intel CPUs.
> > Please see the " Intel(r) 64 and IA-32 Architectures Software Developer's
> > Manual" Volume 3
> > (http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-i
> > a-32-architectures-software-developer-system-programming-manual-325384.pdf
> > ) , Section 17.13 for more details on this.
>
> Hmm, that's strange. I don't know how to interpret my observations then.
> I have access to two platforms, one is based on Intel(R) Xeon(R) CPU
> E3-1230 V2 @ 3.30GHz and another on Intel(R) Xeon(R) CPU E3-1270 v3 @
> 3.50GHz. Both running ubuntu-12.04 server. I see repeating errors on NIC
> initialisation phase. The error frequency greatly reduces if I patch
> loop limit as I described earlier or if I call rte_power_init and
> rte_power_freq_max as Thomas suggested.
>
> But the only way to get rid of them completely is to set performance
> governor.
Please check that your hardware do not support invariant TSC.
It would explain why you need to fix frequency.
I attach a simple code to test CPU feature "Invariant TSC".
--
Thomas
next prev parent reply other threads:[~2013-11-29 12:25 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-22 12:29 Sporadic errors while initializing NICs in example applications, dpdk-1.5.0r1 Dmitry Vyal
[not found] ` <528F4E41.2000405-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-11-22 12:48 ` Thomas Monjalon
[not found] ` <201311221348.02307.thomas.monjalon-pdR9zngts4EAvxtiuMwx3w@public.gmane.org>
2013-11-27 14:06 ` Dmitry Vyal
[not found] ` <5295FC76.70201-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-11-27 14:10 ` jigsaw
2013-11-27 14:42 ` Thomas Monjalon
[not found] ` <201311271542.05288.thomas.monjalon-pdR9zngts4EAvxtiuMwx3w@public.gmane.org>
2013-11-28 11:01 ` Richardson, Bruce
[not found] ` <59AF69C657FD0841A61C55336867B5B01A9781FC-kPTMFJFq+rELt2AQoY/u9bfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2013-11-29 10:53 ` Dmitry Vyal
[not found] ` <52987236.3020707-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-11-29 12:25 ` Thomas Monjalon [this message]
2013-11-29 12:39 ` Thomas Monjalon
2013-12-06 12:43 ` Dmitry Vyal
2013-11-29 18:20 ` Thomas Monjalon
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