From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: anjo@rev.ng, qemu-arm@nongnu.org, git@xen0n.name,
17746591750@163.com, maobibo@loongson.cn, lixianglai@loongson.cn,
philmd@mailo.com, Pierrick Bouvier <pierrick.bouvier@linaro.org>
Subject: Re: [PATCH 02/11] tcg: Add tcg_gen_revbit{32,64}
Date: Fri, 31 Jul 2026 08:49:33 +0200 [thread overview]
Message-ID: <348faafd-2346-43dd-85d0-4ed7fe965ebb@oss.qualcomm.com> (raw)
In-Reply-To: <20260731000503.170446-3-richard.henderson@linaro.org>
Hi Richard,
On 31/7/26 02:04, Richard Henderson wrote:
> Add generic expanders for reversing bits within a word.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/tcg/tcg-op-common.h | 3 ++
> include/tcg/tcg-op.h | 5 ++++
> tcg/tcg-op.c | 59 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 67 insertions(+)
>
> diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h
> index 1fe342db0d..91f59dc11e 100644
> --- a/include/tcg/tcg-op-common.h
> +++ b/include/tcg/tcg-op-common.h
> @@ -275,6 +276,8 @@ void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
> void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
> void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
> void tcg_gen_abs_i64(TCGv_i64, TCGv_i64);
> +void tcg_gen_revbit32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
> +void tcg_gen_revbit64_i64(TCGv_i64 ret, TCGv_i64 arg);
Could the bswap flag be defined once per target?
- output sign-extended (TCG_BSWAP_OS):
alpha, hppa, loongarch, m68k, mips, riscv, rx, sh4, tricore
- output zero-extended (TCG_BSWAP_OZ):
arm, avr, hexagon, microblaze, openrisc, ppc, sparc, x86, xtensa
- input/output zero-extended (TCG_BSWAP_IZ | TCG_BSWAP_OZ):
s390x
Having to manually encode it on each frontend doesn't sound optimal.
Note, we have some target-specific TCG information in TCGCPUOps
(useful at runtime for heterogeneous emulation).
next prev parent reply other threads:[~2026-07-31 6:49 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-31 0:04 [PATCH 00/11] tcg: Add revbit opcodes Richard Henderson
2026-07-31 0:04 ` [PATCH 01/11] tcg: Fix opcode dump for bswap Richard Henderson
2026-08-03 15:08 ` Philippe Mathieu-Daudé
2026-07-31 0:04 ` [PATCH 02/11] tcg: Add tcg_gen_revbit{32,64} Richard Henderson
2026-07-31 6:08 ` Philippe Mathieu-Daudé
2026-07-31 6:41 ` Philippe Mathieu-Daudé
2026-07-31 8:55 ` Philippe Mathieu-Daudé
2026-07-31 6:49 ` Philippe Mathieu-Daudé [this message]
2026-07-31 14:29 ` Richard Henderson
2026-08-10 11:15 ` Anton Johansson via
2026-08-10 11:15 ` Anton Johansson via qemu development
2026-07-31 0:04 ` [PATCH 03/11] target/arm: Use generic tcg_gen_revbit* Richard Henderson
2026-07-31 6:08 ` Philippe Mathieu-Daudé
2026-07-31 0:04 ` [PATCH 04/11] target/loongarch: " Richard Henderson
2026-07-31 6:10 ` Philippe Mathieu-Daudé
2026-08-05 9:16 ` Song Gao
2026-07-31 0:04 ` [PATCH 05/11] target/loongarch: Expand bitswap inline Richard Henderson
2026-08-05 9:17 ` Song Gao
2026-07-31 0:04 ` [PATCH 06/11] target/mips: Expand octeon reflections inline Richard Henderson
2026-08-10 11:29 ` Anton Johansson via
2026-08-10 11:29 ` Anton Johansson via qemu development
2026-07-31 0:04 ` [PATCH 07/11] tcg: Add revbit{32,64} opcodes Richard Henderson
2026-07-31 7:02 ` Philippe Mathieu-Daudé
2026-08-10 12:15 ` Anton Johansson via qemu development
2026-08-10 12:15 ` Anton Johansson via
2026-07-31 0:05 ` [PATCH 08/11] tcg/optimize: Handle revbit{32,64} Richard Henderson
2026-08-03 14:58 ` Philippe Mathieu-Daudé
2026-08-10 10:44 ` Anton Johansson via
2026-08-10 10:44 ` Anton Johansson via qemu development
2026-07-31 0:05 ` [PATCH 09/11] tcg/aarch64: Implement revbit{32,64} Richard Henderson
2026-07-31 7:12 ` Philippe Mathieu-Daudé
2026-07-31 0:05 ` [PATCH 10/11] tcg/loongarch64: Import REVBIT insns Richard Henderson
2026-08-03 15:06 ` Philippe Mathieu-Daudé
2026-08-03 17:26 ` Richard Henderson
2026-08-04 2:51 ` Philippe Mathieu-Daudé
2026-07-31 0:05 ` [PATCH 11/11] tcg/loongarch64: Implement revbit{32,64} Richard Henderson
2026-08-03 14:59 ` Philippe Mathieu-Daudé
2026-08-10 12:15 ` Anton Johansson via qemu development
2026-08-10 12:15 ` Anton Johansson via
2026-08-10 10:46 ` [PATCH 00/11] tcg: Add revbit opcodes Anton Johansson via qemu development
2026-08-10 10:46 ` Anton Johansson via
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=348faafd-2346-43dd-85d0-4ed7fe965ebb@oss.qualcomm.com \
--to=philmd@oss.qualcomm.com \
--cc=17746591750@163.com \
--cc=anjo@rev.ng \
--cc=git@xen0n.name \
--cc=lixianglai@loongson.cn \
--cc=maobibo@loongson.cn \
--cc=philmd@mailo.com \
--cc=pierrick.bouvier@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.