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No, they were not ignored. I will make sure to address in a V2 patch. > >>> >>>> + >>>> +maintainers: >>>> + - Gregory Williams >>>> + >>>> +description: >>>> + The AMD AI Engine is a tile processor with many cores (up to 400) that >>>> + can run in parallel. The data routing between cores is configured through >>>> + internal switches, and shim tiles interface with external interconnect, such >>>> + as memory or PL. One AI engine device can have multiple apertures, each >>>> + has its own address space and interrupt. At runtime application can create >>>> + multiple partitions within an aperture which are groups of columns of AI >>>> + engine tiles. Each AI engine partition is the minimum resetable unit for an >>>> + AI engine application. >>>> + >>>> +properties: >>>> + compatible: >>>> + const: xlnx,ai-engine-v2.0 >>> >>> What does v2.0 stands for? Versioning is discouraged, unless mapping is >>> well documented. >> >> Sure, I will remove the versioning in V2 patch. > > This should be specific to product, so use the actual product/model name. > > Is this part of a Soc? Then standard rules apply... but I could not > deduce it from the descriptions or commit msgs. Yes this is part of an SoC. I will be more descriptive in V2 patch. > > >> >>> >>>> + >>>> + reg: >>>> + maxItems: 1 >>>> + >>>> + '#address-cells': >>>> + const: 2 >>>> + >>>> + '#size-cells': >>>> + const: 2 >>>> + >>>> + power-domains: >>> >>> Missing constraints. >>> >>>> + description: >>>> + Platform management node id used to request power management services >>>> + from the firmware driver. >>> >>> Drop description, redundant. >>> >>>> + >>>> + xlnx,aie-gen: >>>> + $ref: /schemas/types.yaml#/definitions/uint8 >>> >>> Why uint8? >>> >>>> + description: >>>> + Hardware generation of AI engine device. E.g. the current values supported >>>> + are 1 (AIE) and 2 (AIEML). >>> >>> No clue what's that, but it is implied by compatible, isn't it? >> >> The driver supports multiple hardware generations. During driver probe, this value is read from the device tree and hardware generation specific > > Bindings are about hardware, not driver, so your driver arguments are > not valid. Understood. > >> data structures are loaded based on this value. The compatible string is the same between devices. > > No. See writing bindings. Ok so there should be a different compatible strings based on hardware generation. I will fix this for a V2 patch. > >> >>> >>> Missing constraints. >>> >>>> + >>>> + xlnx,shim-rows: >>>> + $ref: /schemas/types.yaml#/definitions/uint8-array >>>> + description: >>>> + start row and the number of rows of SHIM tiles of the AI engine device >>> >>> Implied by compatible. >> >> The AI Engine device can have different configurations for number of rows and column (even if it is the same hardware generation). This property >> tells the driver the size and layout of the array, this is not implied by compatible. > > Wrap your emails correctly. > > Again driver.. no, please describe the hardware, not your drivers. I see in 'writing bindings' that I should use device-based compatible string. I will do this and remove these nodes for V2 patch. Thanks again for your time, Greg > > > Best regards, > Krzysztof