From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH v3 04/16] x86emul/test: drop cpu_has_avx512vl
Date: Wed, 11 Dec 2024 11:12:45 +0100 [thread overview]
Message-ID: <35109b64-87bb-435a-b3e9-2c5b378532e9@suse.com> (raw)
In-Reply-To: <516b7f9a-048e-409d-8a4e-89aeb8ffacc4@suse.com>
AVX512VL not being a standalone feature anyway, but always needing
to be combined with some other AVX512*, replace uses of
cpu_has_avx512vl by just the feature bit check.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: Re-base over dropping of Xeon Phi support.
--- a/tools/tests/x86_emulator/evex-disp8.c
+++ b/tools/tests/x86_emulator/evex-disp8.c
@@ -998,7 +998,8 @@ static void test_group(const struct test
{
for ( j = 0; j < nr_vl; ++j )
{
- if ( vl[0] == VL_512 && vl[j] != VL_512 && !cpu_has_avx512vl )
+ if ( vl[0] == VL_512 && vl[j] != VL_512 &&
+ !cpu_policy.feat.avx512vl )
continue;
switch ( tests[i].esz )
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -131,7 +131,7 @@ static bool simd_check_avx512f(void)
static bool simd_check_avx512f_vl(void)
{
- return cpu_has_avx512f && cpu_has_avx512vl;
+ return cpu_has_avx512f && cpu_policy.feat.avx512vl;
}
#define simd_check_avx512vl_sg simd_check_avx512f_vl
@@ -143,7 +143,7 @@ static bool simd_check_avx512dq(void)
static bool simd_check_avx512dq_vl(void)
{
- return cpu_has_avx512dq && cpu_has_avx512vl;
+ return cpu_has_avx512dq && cpu_policy.feat.avx512vl;
}
static bool simd_check_avx512bw(void)
@@ -154,7 +154,7 @@ static bool simd_check_avx512bw(void)
static bool simd_check_avx512bw_vl(void)
{
- return cpu_has_avx512bw && cpu_has_avx512vl;
+ return cpu_has_avx512bw && cpu_policy.feat.avx512vl;
}
static bool simd_check_avx512vbmi(void)
@@ -164,7 +164,7 @@ static bool simd_check_avx512vbmi(void)
static bool simd_check_avx512vbmi_vl(void)
{
- return cpu_has_avx512_vbmi && cpu_has_avx512vl;
+ return cpu_has_avx512_vbmi && cpu_policy.feat.avx512vl;
}
static bool simd_check_avx512vbmi2(void)
@@ -260,7 +260,7 @@ static bool simd_check_avx512fp16(void)
static bool simd_check_avx512fp16_vl(void)
{
- return cpu_has_avx512_fp16 && cpu_has_avx512vl;
+ return cpu_has_avx512_fp16 && cpu_policy.feat.avx512vl;
}
static void simd_set_regs(struct cpu_user_regs *regs)
--- a/tools/tests/x86_emulator/x86-emulate.h
+++ b/tools/tests/x86_emulator/x86-emulate.h
@@ -173,8 +173,6 @@ void wrpkru(unsigned int val);
#define cpu_has_sha cpu_policy.feat.sha
#define cpu_has_avx512bw (cpu_policy.feat.avx512bw && \
xcr0_mask(0xe6))
-#define cpu_has_avx512vl (cpu_policy.feat.avx512vl && \
- xcr0_mask(0xe6))
#define cpu_has_avx512_vbmi (cpu_policy.feat.avx512_vbmi && \
xcr0_mask(0xe6))
#define cpu_has_avx512_vbmi2 (cpu_policy.feat.avx512_vbmi2 && \
next prev parent reply other threads:[~2024-12-11 10:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-11 10:09 [PATCH v3 00/16] x86: support AVX10 Jan Beulich
2024-12-11 10:11 ` [PATCH v3 01/16] x86/CPUID: enable AVX10 leaf Jan Beulich
2024-12-11 10:11 ` [PATCH v3 02/16] x86emul: support AVX10.1 Jan Beulich
2024-12-11 10:12 ` [PATCH v3 03/16] x86emul/test: use simd_check_avx512*() in main() Jan Beulich
2024-12-11 10:12 ` Jan Beulich [this message]
2024-12-11 10:13 ` [PATCH v3 05/16] x86emul: AVX10.1 testing Jan Beulich
2024-12-11 10:13 ` [PATCH v3 06/16] x86emul/test: engage AVX512VL via command line option Jan Beulich
2024-12-11 10:14 ` [PATCH v3 07/16] x86emul: support AVX10.2 256-bit embedded rounding / SAE Jan Beulich
2024-12-11 10:17 ` [PATCH v3 08/16] x86emul: support AVX10.2 scalar compare insns Jan Beulich
2024-12-11 10:18 ` [PATCH v3 09/16] x86emul: support AVX10.2 partial copy insns Jan Beulich
2024-12-11 10:18 ` [PATCH v3 10/16] x86emul: support AVX10.2 media insns Jan Beulich
2024-12-11 10:19 ` [PATCH v3 11/16] x86emul: support AVX10.2 minmax insns Jan Beulich
2024-12-11 10:19 ` [PATCH v3 12/16] x86emul: support AVX10.2 BFloat16 insns Jan Beulich
2024-12-11 10:20 ` [PATCH v3 13/16] x86emul: support AVX10.2 saturating convert insns Jan Beulich
2024-12-11 10:20 ` [PATCH v3 14/16] x86emul: support other AVX10.2 " Jan Beulich
2024-12-11 10:21 ` [PATCH v3 15/16] x86emul: support SIMD MOVRS Jan Beulich
2024-12-11 10:22 ` [PATCH v3 16/16] x86emul: support AVX10.2 forms of SM4 insns Jan Beulich
2024-12-11 10:29 ` [PATCH v3 00/16] x86: support AVX10 Jan Beulich
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