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X-CSE-ConnectionGUID: oejvZasXQaGhi+axuyn/LA== X-CSE-MsgGUID: KRZ6yLH1Ts+E7qee/noI9Q== X-IronPort-AV: E=McAfee;i="6800,10657,11669"; a="80271734" X-IronPort-AV: E=Sophos;i="6.21,222,1763452800"; d="scan'208";a="80271734" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2026 18:29:53 -0800 X-CSE-ConnectionGUID: 9agw02yzRVG8J5EmBZxoNw== X-CSE-MsgGUID: kaSKE/jlTk6DfNppUE3mDg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,222,1763452800"; d="scan'208";a="204655806" Received: from dapengmi-mobl1.ccr.corp.intel.com (HELO [10.124.240.14]) ([10.124.240.14]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2026 18:29:49 -0800 Message-ID: <35123882-b909-43b7-879d-f3802dca2da1@linux.intel.com> Date: Tue, 13 Jan 2026 10:29:38 +0800 Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [Patch v2 7/7] perf/x86/intel: Add support for rdpmc user disable feature To: Peter Zijlstra Cc: Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Andi Kleen , Eranian Stephane , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Dapeng Mi , Zide Chen , Falcon Thomas , Xudong Hao References: <20260112051649.1113435-1-dapeng1.mi@linux.intel.com> <20260112051649.1113435-8-dapeng1.mi@linux.intel.com> <20260112105738.GG830755@noisy.programming.kicks-ass.net> Content-Language: en-US From: "Mi, Dapeng" In-Reply-To: <20260112105738.GG830755@noisy.programming.kicks-ass.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 1/12/2026 6:57 PM, Peter Zijlstra wrote: > On Mon, Jan 12, 2026 at 01:16:49PM +0800, Dapeng Mi wrote: > >> +static void intel_pmu_update_rdpmc_user_disable(struct perf_event *event) >> +{ >> + /* >> + * Counter scope's user-space rdpmc is disabled by default >> + * except two cases. >> + * a. rdpmc = 2 (user space rdpmc enabled unconditionally) >> + * b. rdpmc = 1 and the event is not a system-wide event. >> + * The count of non-system-wide events would be cleared when >> + * context switches, so no count data is leaked. >> + */ >> + if (x86_pmu_has_rdpmc_user_disable(event->pmu)) { >> + if (x86_pmu.attr_rdpmc == X86_USER_RDPMC_ALWAYS_ENABLE || >> + (x86_pmu.attr_rdpmc == X86_USER_RDPMC_CONDITIONAL_ENABLE && >> + event->ctx->task)) >> + event->hw.config &= ~ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE; >> + else >> + event->hw.config |= ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE; >> + } >> +} > Is it not simpler to invert that condition? > > if (x86_pmu.attr_rdpmc == X86_USER_RDPMC_ALWAYS_NEVER || > !event->ctx->task) > event->hw.config |= ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE; > else > event->hw.config &= ~ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE; Hmm, it seems the logic changes along with the code change. The system-wide event should be allowed to read with rdpmc from user space when attr_rdpmc == X86_USER_RDPMC_ALWAYS_ENABLE, but it doesn't with the new code. If we don't change the logic and just invert the condition, the code simplicity has no much change. if (x86_pmu.attr_rdpmc == X86_USER_RDPMC_ALWAYS_NEVER || (x86_pmu.attr_rdpmc == X86_USER_RDPMC_CONDITIONAL_ENABLE && !event->ctx->task)) event->hw.config |= ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE; else event->hw.config &= ~ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE;