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From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	"x86@kernel.org" <x86@kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	"bp@alien8.de" <bp@alien8.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>
Subject: Re: [PATCH 4/4] intel_idle: Add SPR support with AMX INIT-state
Date: Wed, 9 Mar 2022 14:44:25 -0800	[thread overview]
Message-ID: <35279bb7-e986-9c90-3751-4758fab2f2e9@intel.com> (raw)
In-Reply-To: <8735oa4ipo.ffs@tglx>

On 11/5/2021 10:26 AM, Thomas Gleixner wrote:
> On Fri, Nov 05 2021 at 16:03, Bae, Chang Seok wrote:
> 
> My bad. I should have read the cover letter before complaining.
> 
>> I think PATCH3 is better. Maybe PATCH4 should not be sent together to avoid
>> such confusion.
> 
> Yes. patch 3 is way better than patch 4.

At the time of this post, it was clueless whether this TILERELEASE need 
is architectural or implementation-specific. But the latter is the case 
as it turns out. So PATCH4 only appears in V2 here -- 
https://lore.kernel.org/lkml/20220309223431.26560-1-chang.seok.bae@intel.com/

Thanks,
Chang

      reply	other threads:[~2022-03-09 22:44 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-04 22:52 [PATCH 0/4] x86/fpu: Make AMX state ready for CPU idle Chang S. Bae
2021-11-04 22:52 ` [PATCH 1/4] x86/insn/amx: Add TILERELEASE instruction to the opcode map Chang S. Bae
2021-11-04 22:52 ` [PATCH 2/4] x86/fpu: Add a helper to prepare AMX state for CPU idle Chang S. Bae
2021-11-04 22:52 ` [PATCH 3/4] x86/fpu: Prepare " Chang S. Bae
2021-11-04 22:52 ` [PATCH 4/4] intel_idle: Add SPR support with AMX INIT-state Chang S. Bae
2021-11-05 14:33   ` Thomas Gleixner
2021-11-05 16:03     ` Bae, Chang Seok
2021-11-05 17:26       ` Thomas Gleixner
2022-03-09 22:44         ` Chang S. Bae [this message]

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