From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: From: Arnd Bergmann To: Gabriele Paoloni Subject: Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 Date: Wed, 21 Sep 2016 22:18:16 +0200 Message-ID: <3538381.vOsx75UXVU@wuerfel> In-Reply-To: References: <1473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com> MIME-Version: 1.0 List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , "lorenzo.pieralisi@arm.com" , "benh@kernel.crashing.org" , "minyard@acm.org" , "gregkh@linuxfoundation.org" , "linux-pci@vger.kernel.org" , John Garry , "will.deacon@arm.com" , "linux-kernel@vger.kernel.org" , Yuanzhichang , Linuxarm , "xuwei \(O\)" , "linux-serial@vger.kernel.org" , zhichang , "zourongrong@gmail.com" , "liviu.dudau@arm.com" , "kantyzc@163.com" , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="utf-8" Sender: "linux-arm-kernel" Errors-To: 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IHNvbWV0aGluZyB0aGF0IGNhbiBiZSBxdWl0ZSBzaW1wbGUuClRoZSBvbmx5IHRoaW5nIHdlIG5l ZWQgdG8gd29ycnkgYWJvdXQgaXMgdGhhdCB0aGUgaW9fcmFuZ2VfbGlzdApjb250YWlucyBhbiBl bnRyeSBmb3IgdGhlIExQQyBidXMgc28gd2UgZG9uJ3QgY29uZmxpY3Qgd2l0aCB0aGUKUENJIGJ1 c2VzLgoKCUFybmQKCglBcm5kCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVs QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9s aXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 Date: Wed, 21 Sep 2016 22:18:16 +0200 Message-ID: <3538381.vOsx75UXVU@wuerfel> References: <1473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Gabriele Paoloni Cc: "devicetree@vger.kernel.org" , "lorenzo.pieralisi@arm.com" , "benh@kernel.crashing.org" , "minyard@acm.org" , "gregkh@linuxfoundation.org" , "linux-pci@vger.kernel.org" , John Garry , "will.deacon@arm.com" , "linux-kernel@vger.kernel.org" , Yuanzhichang , Linuxarm , "xuwei (O)" , "linux-serial@vger.kernel.org" , zhichang , "zourongrong@gmail.com" , "liviu.dudau@arm.com" , "kantyzc@163.com" , "linux-arm-kernel@lists.infradead.org" List-Id: linux-serial@vger.kernel.org T24gV2VkbmVzZGF5LCBTZXB0ZW1iZXIgMjEsIDIwMTYgNDoyMDo1NSBQTSBDRVNUIEdhYnJpZWxl IFBhb2xvbmkgd3JvdGU6Cj4gPiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQo+ID4gRnJvbTog emhpY2hhbmcgW21haWx0bzp6aGljaGFuZy55dWFuMDJAZ21haWwuY29tXQo+ID4gT24gMjAxNuW5 tDA55pyIMTXml6UgMjA6MjQsIEFybmQgQmVyZ21hbm4gd3JvdGU6Cj4gPiA+IE9uIFRodXJzZGF5 LCBTZXB0ZW1iZXIgMTUsIDIwMTYgMTI6MDU6NTEgUE0gQ0VTVCBHYWJyaWVsZSBQYW9sb25pCj4g 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aXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Wed, 21 Sep 2016 22:18:16 +0200 Subject: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 In-Reply-To: References: <1473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com> Message-ID: <3538381.vOsx75UXVU@wuerfel> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wednesday, September 21, 2016 4:20:55 PM CEST Gabriele Paoloni wrote: > > -----Original Message----- > > From: zhichang [mailto:zhichang.yuan02 at gmail.com] > > On 2016?09?15? 20:24, Arnd Bergmann wrote: > > > On Thursday, September 15, 2016 12:05:51 PM CEST Gabriele Paoloni > > wrote: > > >>> -----Original Message----- > > >>> On Thursday, September 15, 2016 8:02:27 AM CEST Gabriele Paoloni > > wrote: > > >> I think that maybe having the 1:1 range mapping doesn't > > >> reflect well the reality but it is the less painful > > >> solution... > > >> > > >> What's your view? > > > > > > We can check the 'i' bit for I/O space in of_bus_isa_get_flags, > > > and that should be enough to translate the I/O port number. > > > > > > The only part we need to change here is to not go through > > > the crazy conversion all the way from PCI I/O space to a > > > physical address and back to a (logical) port number > > > that we do today with of_translate_address/pci_address_to_pio. > > > > > Sorry for the late response! Several days' leave.... > > Do you want to bypass of_translate_address and pci_address_to_pio for > > the registered specific PIO? > > I think the bypass for of_translate_address is ok, but worry some new > > issues will emerge without the > > conversion between physical address and logical/linux port number. The same function that handles the non-translated region would do that conversion. > > When PCI host bridge which support IO operations is configured and > > enabled, the pci_address_to_pio will > > populate the logical IO range from ZERO for the first host bridge. Our > > LPC will also use part of the IO range > > started from ZERO. It will make in/out enter the wrong branch possibly. > > > > In V2, the 0 - 0x1000 logical IO range is reserved for LPC use only. > > But it seems not so good. In this way, > > PCI has no chance to use low 4K IO range(logical). > > > > So, in V3, applying the conversion from physical/cpu address to > > logical/linux IO port for any IO ranges, > > including the LPC, but recorded the logical IO range for LPC. When > > calling in/out with a logical port address, > > we can check this port fall into LPC logical IO range and get back the > > real IO. Right, and the same translation can be used in __of_address_to_resource() going the opposite way. > > Do you have further comments about this?? > > I think there are two separate issues to be discussed: > > The first issue is about having of_translate_address failing due to > "range" missing. About this Arnd suggested that it is not appropriate > to have a range describing a bridge 1:1 mapping and this was discussed > before in this thread. Arnd had a suggestion about this (see below) > however (looking twice at the code) it seems to me that such solution > would lead to quite some duplication from __of_translate_address() > in order to retrieve the actual addr from dt... I don't think we need to duplicate much, we can probably safely assume that there are no nontrivial ranges in devices below the LPC node, so we just walk up the bus to see if the node is a child (or possibly grandchild etc) of the LPC bus, and treat any IO port number under there as a physical port number, which has a known offset from the Linux I/O port number. > I think extending of_empty_ranges_quirk() may be a reasonable solution. > What do you think Arnd? I don't really like that idea, that quirk is meant to work around broken DTs, but we can just make the DT valid and implement the code properly. > The second issue is a conflict between cpu addresses used by the LPC > controller and i/o tokens from pci endpoints. > > About this what if we modify armn64_extio_ops to have a list of ranges > rather than only one range (now we have just start/end); then in the > LPC driver we can scan the LPC child devices and > 1) populate such list of ranges > 2) call pci_register_io_range for such ranges Scanning the child devices sounds really wrong, please register just one range that covers the bus to keep the workaround as simple as possible. > Then when calling __of_address_to_resource we retrieve I/O tokens > for the devices on top of the LPC driver and in the I/O accessors > we call pci_pio_to_address to figure out the cpu address and compare > it to the list of ranges in armn64_extio_ops. > > What about this? That seems really complex for something that can be quite simple. The only thing we need to worry about is that the io_range_list contains an entry for the LPC bus so we don't conflict with the PCI buses. Arnd Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933810AbcIUUTW convert rfc822-to-8bit (ORCPT ); Wed, 21 Sep 2016 16:19:22 -0400 Received: from mout.kundenserver.de ([212.227.17.10]:50246 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932340AbcIUUTT (ORCPT ); Wed, 21 Sep 2016 16:19:19 -0400 From: Arnd Bergmann To: Gabriele Paoloni Cc: zhichang , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "lorenzo.pieralisi@arm.com" , "minyard@acm.org" , "linux-pci@vger.kernel.org" , "gregkh@linuxfoundation.org" , John Garry , "will.deacon@arm.com" , "linux-kernel@vger.kernel.org" , Yuanzhichang , Linuxarm , "xuwei (O)" , "linux-serial@vger.kernel.org" , "benh@kernel.crashing.org" , "zourongrong@gmail.com" , "liviu.dudau@arm.com" , "kantyzc@163.com" Subject: Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 Date: Wed, 21 Sep 2016 22:18:16 +0200 Message-ID: <3538381.vOsx75UXVU@wuerfel> User-Agent: KMail/5.1.3 (Linux/4.4.0-34-generic; KDE/5.18.0; x86_64; ; ) In-Reply-To: References: <1473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K0:y3tqXZsy7mzdP37taASK8hpliyRveRJ7t4q7sNlR6LJWiYhmhGH pmdnQtfLmyjlPeWu2SNJXo2dJZgjIGEFozUM0DmPCKHlBbapR0ELOZtg0C0rY8ug2KEA+kB 3Ct4fViWJKci0yeWEzbrAW1iUjWc9TVzKE/FixCbgOsBJcTBJ+zR0LPshRF8CHZ9X5BVH9y o9F2tFUzyNiXEvyR+IyUw== X-UI-Out-Filterresults: notjunk:1;V01:K0:4eNMAo8LRyk=:s5Zd6k5UBCARyjkxWA6c6I jVvEtXMVdzHxK9Ofm1G+YQj48Y+fVoR90N/TIlUUoJKTRdznU09d0BbmwZAeT0zJZsIcLxuLs a4OZL+/SpXE72YCjXDP7xe/tR8cb9eQJ9Wys/ebWW/ziUItF+CaCzwAXVA/7Twy2rFmzRqUn7 Knt5W9H7iH1AZZL3TQ9S3o0+rWjvJhQ1pmA8EN2g+I5iDYeLMN7gXyIqcmUAVqrIQPKHGxJIw vuiW18Cp6KW21kr182+V9sG4hBxoUqO4OHNZbJWyjNDwXR7DLpJvOt58Ld1m3BjgEkQ9hP2Tr Zlt+1Zlvx6UtapYIsuQEDGAKm7xIkO7G8CQ2sWE372Iu9T9ndJ33nE+o3ExxF7ICl8gUkB/nb ruC7JdpZy4Pv7o4uA7vdW3qjRcqYaeiWKoifwcNeGt/2LH5QAiOc28wCThJ69BEkOwhZOqKcK 1Di8lXp02IMqK2m8cPUoAixwcvxMPCE0LPDeicMWLjocm7LMe/QFD9OQ6487eJflQo61BZhfH fXnA3O1eNozKFTRPRwyPmscrXs3+0Kzei55zLdh1+sfqkSHGVe5QAZrFUEGG5IFkNwRjtWJjn PbgAWFaSXZjLFrwXnQ4DkefBNB6ilfcHkhIE82sMUAKHtx7lLUkDHCysANzbKNppH5O3/45HT zHkii5VaZ5BX1Npt5B753GjNQDQiPBwd8Ux2bNxoXCnnZGKCQcYI0m9hs63tJafBr6LLbfFiK qwqnedka2NIXAY4n Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday, September 21, 2016 4:20:55 PM CEST Gabriele Paoloni wrote: > > -----Original Message----- > > From: zhichang [mailto:zhichang.yuan02@gmail.com] > > On 2016年09月15日 20:24, Arnd Bergmann wrote: > > > On Thursday, September 15, 2016 12:05:51 PM CEST Gabriele Paoloni > > wrote: > > >>> -----Original Message----- > > >>> On Thursday, September 15, 2016 8:02:27 AM CEST Gabriele Paoloni > > wrote: > > >> I think that maybe having the 1:1 range mapping doesn't > > >> reflect well the reality but it is the less painful > > >> solution... > > >> > > >> What's your view? > > > > > > We can check the 'i' bit for I/O space in of_bus_isa_get_flags, > > > and that should be enough to translate the I/O port number. > > > > > > The only part we need to change here is to not go through > > > the crazy conversion all the way from PCI I/O space to a > > > physical address and back to a (logical) port number > > > that we do today with of_translate_address/pci_address_to_pio. > > > > > Sorry for the late response! Several days' leave.... > > Do you want to bypass of_translate_address and pci_address_to_pio for > > the registered specific PIO? > > I think the bypass for of_translate_address is ok, but worry some new > > issues will emerge without the > > conversion between physical address and logical/linux port number. The same function that handles the non-translated region would do that conversion. > > When PCI host bridge which support IO operations is configured and > > enabled, the pci_address_to_pio will > > populate the logical IO range from ZERO for the first host bridge. Our > > LPC will also use part of the IO range > > started from ZERO. It will make in/out enter the wrong branch possibly. > > > > In V2, the 0 - 0x1000 logical IO range is reserved for LPC use only. > > But it seems not so good. In this way, > > PCI has no chance to use low 4K IO range(logical). > > > > So, in V3, applying the conversion from physical/cpu address to > > logical/linux IO port for any IO ranges, > > including the LPC, but recorded the logical IO range for LPC. When > > calling in/out with a logical port address, > > we can check this port fall into LPC logical IO range and get back the > > real IO. Right, and the same translation can be used in __of_address_to_resource() going the opposite way. > > Do you have further comments about this?? > > I think there are two separate issues to be discussed: > > The first issue is about having of_translate_address failing due to > "range" missing. About this Arnd suggested that it is not appropriate > to have a range describing a bridge 1:1 mapping and this was discussed > before in this thread. Arnd had a suggestion about this (see below) > however (looking twice at the code) it seems to me that such solution > would lead to quite some duplication from __of_translate_address() > in order to retrieve the actual addr from dt... I don't think we need to duplicate much, we can probably safely assume that there are no nontrivial ranges in devices below the LPC node, so we just walk up the bus to see if the node is a child (or possibly grandchild etc) of the LPC bus, and treat any IO port number under there as a physical port number, which has a known offset from the Linux I/O port number. > I think extending of_empty_ranges_quirk() may be a reasonable solution. > What do you think Arnd? I don't really like that idea, that quirk is meant to work around broken DTs, but we can just make the DT valid and implement the code properly. > The second issue is a conflict between cpu addresses used by the LPC > controller and i/o tokens from pci endpoints. > > About this what if we modify armn64_extio_ops to have a list of ranges > rather than only one range (now we have just start/end); then in the > LPC driver we can scan the LPC child devices and > 1) populate such list of ranges > 2) call pci_register_io_range for such ranges Scanning the child devices sounds really wrong, please register just one range that covers the bus to keep the workaround as simple as possible. > Then when calling __of_address_to_resource we retrieve I/O tokens > for the devices on top of the LPC driver and in the I/O accessors > we call pci_pio_to_address to figure out the cpu address and compare > it to the list of ranges in armn64_extio_ops. > > What about this? That seems really complex for something that can be quite simple. The only thing we need to worry about is that the io_range_list contains an entry for the LPC bus so we don't conflict with the PCI buses. Arnd Arnd