Re: [PATCH v6 09/35] target/mips: add Octeon LHUX instruction

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

On 11/5/26 20:22, James Hilliard wrote:
> LHUX performs an indexed unsigned halfword load from base + index and
> zero-extends the result into rd.
> 
> Add the decode entry and reuse the common indexed-load translator with
> MO_UW.
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
> ---
> Changes v2 -> v3:
>    - Split LHUX out of the combined Octeon arithmetic and memory
>      instruction patch.  (requested by Richard Henderson)
> ---
>   target/mips/tcg/octeon.decode      | 1 +
>   target/mips/tcg/octeon_translate.c | 1 +
>   2 files changed, 2 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>