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From: Arnd Bergmann <arnd@arndb.de>
To: Tim Harvey <tharvey@gateworks.com>
Cc: "Lucas Stach" <l.stach@pengutronix.de>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"Richard Zhu" <Richard.Zhu@freescale.com>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	"Krzysztof Hałasa" <khalasa@piap.pl>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Petr Štetiar" <ynezz@true.cz>,
	"Fabio Estevam" <festevam@gmail.com>
Subject: Re: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity
Date: Tue, 29 Mar 2016 21:39:20 +0200	[thread overview]
Message-ID: <3601512.SumN6MaWDe@wuerfel> (raw)
In-Reply-To: <CAJ+vNU01JFRXSzF-0OhvyLds03mbbeBbw0by0dwuCotdxpDuog@mail.gmail.com>

On Tuesday 29 March 2016 10:38:16 Tim Harvey wrote:
> On Tue, Mar 29, 2016 at 8:24 AM, Arnd Bergmann <arnd@arndb.de> wrote:
> > On Tuesday 29 March 2016 08:10:08 Tim Harvey wrote:
> >> Arnd,
> >>
> >> Right, on the IMX the MSI interrupt is GIC-120 which is also the
> >> legacy INTD and I do see that if I happen to put a radio in a slot
> >> where due to swizzling its pin1 becomes INTD (GIC-120) the interrupt
> >> does fire and the device works. Any other slot using GIC-123 (INTA),
> >> GIC-122 (INTB), or GIC-121 (INTC) never fires so its very possible
> >> that something in the designware core is masking out the legacy irqs.
> >
> > Interesting. I was actually expecting the opposite here, having the
> > IRQs only work if they are not IntD.
> >
> >
> >> I typically advise our users to 'not' enable MSI because
> >> architecturally you can spread 4 distinct legacy irq's across CPU's
> >> better than a single shared irq.
> >
> > That is a very good point, I never understood why we want to enable
> > MSI support on any PCI host bridge that just forwards all MSIs
> > to a single IRQ line. Originally MSI was meant as a performance
> > feature, but there is nothing in this setup that makes things go
> > faster, and several things that make it go slower.
> 
> I had a conversation once with Lucas about implementing the shared MSI
> interrupt in such a way that its smp affinity could be set to other
> CPU's to gain a performance benefit in certain multi-device cases.
> 
> While this is technically possible it would involve creating a softirq
> glue between the different handlers but that would add overhead of a
> softirq plus potentially waking up another CPU to every IRQ which
> would end up adding some overhead to even the simple single-device
> case.
> 
> Without any hard data it wasn't clear if this was worth it or if there
> was a clean way to provide this as build-time or run-time option.

I think it's pretty clear that this would take things from 'somewhat silly'
to 'completely bonkers' ;-)

	Arnd

WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity
Date: Tue, 29 Mar 2016 21:39:20 +0200	[thread overview]
Message-ID: <3601512.SumN6MaWDe@wuerfel> (raw)
In-Reply-To: <CAJ+vNU01JFRXSzF-0OhvyLds03mbbeBbw0by0dwuCotdxpDuog@mail.gmail.com>

On Tuesday 29 March 2016 10:38:16 Tim Harvey wrote:
> On Tue, Mar 29, 2016 at 8:24 AM, Arnd Bergmann <arnd@arndb.de> wrote:
> > On Tuesday 29 March 2016 08:10:08 Tim Harvey wrote:
> >> Arnd,
> >>
> >> Right, on the IMX the MSI interrupt is GIC-120 which is also the
> >> legacy INTD and I do see that if I happen to put a radio in a slot
> >> where due to swizzling its pin1 becomes INTD (GIC-120) the interrupt
> >> does fire and the device works. Any other slot using GIC-123 (INTA),
> >> GIC-122 (INTB), or GIC-121 (INTC) never fires so its very possible
> >> that something in the designware core is masking out the legacy irqs.
> >
> > Interesting. I was actually expecting the opposite here, having the
> > IRQs only work if they are not IntD.
> >
> >
> >> I typically advise our users to 'not' enable MSI because
> >> architecturally you can spread 4 distinct legacy irq's across CPU's
> >> better than a single shared irq.
> >
> > That is a very good point, I never understood why we want to enable
> > MSI support on any PCI host bridge that just forwards all MSIs
> > to a single IRQ line. Originally MSI was meant as a performance
> > feature, but there is nothing in this setup that makes things go
> > faster, and several things that make it go slower.
> 
> I had a conversation once with Lucas about implementing the shared MSI
> interrupt in such a way that its smp affinity could be set to other
> CPU's to gain a performance benefit in certain multi-device cases.
> 
> While this is technically possible it would involve creating a softirq
> glue between the different handlers but that would add overhead of a
> softirq plus potentially waking up another CPU to every IRQ which
> would end up adding some overhead to even the simple single-device
> case.
> 
> Without any hard data it wasn't clear if this was worth it or if there
> was a clean way to provide this as build-time or run-time option.

I think it's pretty clear that this would take things from 'somewhat silly'
to 'completely bonkers' ;-)

	Arnd

  reply	other threads:[~2016-03-29 19:40 UTC|newest]

Thread overview: 85+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-25 13:32 [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity Krzysztof Hałasa
2016-03-25 13:32 ` Krzysztof Hałasa
2016-03-27 14:44 ` Fabio Estevam
2016-03-27 14:44   ` Fabio Estevam
2016-03-28  0:26   ` Fabio Estevam
2016-03-28  0:26     ` Fabio Estevam
2016-03-28 19:59     ` Tim Harvey
2016-03-28 19:59       ` Tim Harvey
2016-03-28 20:13       ` Fabio Estevam
2016-03-28 20:13         ` Fabio Estevam
2016-03-28 20:42         ` Tim Harvey
2016-03-28 20:42           ` Tim Harvey
2016-03-28 21:30           ` Fabio Estevam
2016-03-28 21:30             ` Fabio Estevam
2016-03-28 22:06             ` Tim Harvey
2016-03-28 22:06               ` Tim Harvey
2016-03-28 22:13               ` Fabio Estevam
2016-03-28 22:13                 ` Fabio Estevam
2016-03-29  5:40                 ` Krzysztof Hałasa
2016-03-29  5:40                   ` Krzysztof Hałasa
2016-03-29  5:43                   ` Krzysztof Hałasa
2016-03-29  5:43                     ` Krzysztof Hałasa
2016-03-29  5:29               ` Krzysztof Hałasa
2016-03-29  5:29                 ` Krzysztof Hałasa
2016-03-29  8:55               ` Lucas Stach
2016-03-29  8:55                 ` Lucas Stach
2016-03-29 10:39                 ` Krzysztof Hałasa
2016-03-29 10:39                   ` Krzysztof Hałasa
2016-03-29 10:55                   ` Lucas Stach
2016-03-29 10:55                     ` Lucas Stach
2016-03-29 13:12                     ` Arnd Bergmann
2016-03-29 13:12                       ` Arnd Bergmann
2016-03-29 13:32                     ` Tim Harvey
2016-03-29 13:32                       ` Tim Harvey
2016-03-29 13:52                       ` Arnd Bergmann
2016-03-29 13:52                         ` Arnd Bergmann
2016-03-29 14:29                         ` Tim Harvey
2016-03-29 14:29                           ` Tim Harvey
2016-03-29 14:50                           ` Arnd Bergmann
2016-03-29 14:50                             ` Arnd Bergmann
2016-03-29 15:10                             ` Tim Harvey
2016-03-29 15:10                               ` Tim Harvey
2016-03-29 15:24                               ` Arnd Bergmann
2016-03-29 15:24                                 ` Arnd Bergmann
2016-03-29 17:38                                 ` Tim Harvey
2016-03-29 17:38                                   ` Tim Harvey
2016-03-29 19:39                                   ` Arnd Bergmann [this message]
2016-03-29 19:39                                     ` Arnd Bergmann
2016-03-29 17:56                                 ` Marc Zyngier
2016-03-29 17:56                                   ` Marc Zyngier
2016-03-29 16:13                               ` Roberto Fichera
2016-03-29 16:13                                 ` Roberto Fichera
2016-03-29 16:40                                 ` Tim Harvey
2016-03-29 16:40                                   ` Tim Harvey
2016-03-29 16:44                                   ` Roberto Fichera
2016-03-29 16:44                                     ` Roberto Fichera
2016-03-29 17:31                                     ` Tim Harvey
2016-03-29 17:31                                       ` Tim Harvey
2016-03-30  8:00                                       ` Roberto Fichera
2016-03-30  8:00                                         ` Roberto Fichera
2016-03-30 10:10                                         ` Arnd Bergmann
2016-03-30 10:10                                           ` Arnd Bergmann
2016-03-30 12:50                                           ` Roberto Fichera
2016-03-30 12:50                                             ` Roberto Fichera
2016-03-30 13:38                                             ` Tim Harvey
2016-03-30 13:38                                               ` Tim Harvey
2016-03-30 15:20                                               ` Roberto Fichera
2016-03-30 15:20                                                 ` Roberto Fichera
2016-03-30  8:10                     ` Krzysztof Hałasa
2016-03-30  8:10                       ` Krzysztof Hałasa
2016-03-31 16:19                       ` Tim Harvey
2016-03-31 16:19                         ` Tim Harvey
2016-04-04 10:37                         ` Krzysztof Hałasa
2016-04-04 10:37                           ` Krzysztof Hałasa
2016-03-29 14:14                 ` Fabio Estevam
2016-03-29 14:14                   ` Fabio Estevam
2016-03-29  5:21           ` Krzysztof Hałasa
2016-03-29  5:21             ` Krzysztof Hałasa
2016-03-30 12:06 ` Petr Štetiar
2016-03-30 12:06   ` Petr Štetiar
2016-03-30 12:45   ` Fabio Estevam
2016-03-30 12:45     ` Fabio Estevam
2016-03-30 14:38   ` Marcel Ziswiler
2016-03-30 14:38     ` Marcel Ziswiler
2016-03-30 14:38     ` Marcel Ziswiler

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