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Message-ID: <36e84512-9b44-303e-2834-5aafe9c6cc15@amd.com> Date: Mon, 7 Nov 2022 12:49:26 +0000 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.4.1 Subject: Re: [XEN v2] xen/Arm: Enforce alignment check for atomic read/write To: Julien Grall , Ayan Kumar Halder , xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, stefanos@xilinx.com, Volodymyr_Babchuk@epam.com, bertrand.marquis@arm.com, michal.orzel@amd.com References: <20221104162355.23369-1-ayan.kumar.halder@amd.com> <062c9507-7744-0742-effb-76d2f1222a27@xen.org> <33a2d125-b7f2-3637-9dab-6b7d616fd4ff@amd.com> From: Ayan Kumar Halder In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: LO4P123CA0276.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:195::11) To SN6PR12MB2621.namprd12.prod.outlook.com (2603:10b6:805:73::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN6PR12MB2621:EE_|CY5PR12MB6527:EE_ X-MS-Office365-Filtering-Correlation-Id: 1e77b61d-1dc1-4fec-e87b-08dac0be8440 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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So the commit does not apply here. > > Right, but your commit message refers to the alignment check on arm32. > You wrote too much for someone to wonder but not enough to explain why > we can't enable the alignment check on arm64. > >>> >>> I think the commit message/title should clarify that the check is >>> *only* done during debug build. IOW, there are no enforcement in >>> producation build. >> >> AFAICS read_atomic()/write_atomic() is enabled during non debug >> builds (ie CONFIG_DEBUG=n) as well. > > My point was that ASSERT() is a NOP in production build. So you > effectively the enforcement happens only in debug build. > > IOW, unless you test exhaustively with a debug build, you may never > notice that the access was not atomic. This makes sense. Does the following commit message look better ? xen/Arm: Enforce alignment check for atomic read/write Refer ARM DDI 0487I.a ID081822, B2.2.1 "Requirements for single-copy atomicity - A read that is generated by a load instruction that loads a single general-purpose register and is aligned to the size of the read in the instruction is single-copy atomic. -A write that is generated by a store instruction that stores a single general-purpose register and is aligned to the size of the write in the instruction is single-copy atomic" Thus, one needs to check for alignment when performing atomic operations. However, as ASSERT() are disabled in production builds, so one needs to run the debug builds to catch any unaligned access during atomic operations. Enforcing alignment checks during production build has quite a high overhead. On AArch32, the alignment check is enabled at boot time by setting HSCTLR.A bit. ("HSCTLR, Hyp System Control Register"). However, on AArch64, memcpy()/memset() may be used on 64bit unaligned addresses. Thus, one does not wish to enable alignment check at boot time. Signed-off-by: Ayan Kumar Halder Reviewed-by: Michal Orzel Reviewed-by: Bertrand Marquis I think I can keep R-b as there is no code change ? - Ayan > > Cheers, >