Re: [PATCH v7] Terasic DE0-Nano-SoC: add support

[Tim Sander <tim@krieglstein.org>]

Hi

Am Freitag, 26. Februar 2016, 08:25:06 schrieb Sascha Hauer:
> On Thu, Feb 25, 2016 at 11:29:42AM +0100, Tim Sander wrote:
> > v7: eof whitespace fixes
> > 
> > A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
> > The pretty similar Socrates Board was taken as a starting point with
> > pulling in the memory timings/pinmux from
> > http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardware
> > Design
> > 
> > Signed-off-by: Tim Sander <tim@krieglstein.org>
> 
> Applied, thanks. Please provide a Changelog next time, otherwise it's
> hard to guess what you actually changed.
I only included the change for the last patch not the whole stuff, so if i 
understand correctly i will include all changelog files the next time.
 
> BTW I noticed the xload defconfig does not build anymore with this patch
> applied because the image gets too big. I searched for the reason at got
> a step closer. The SDRAM sequencer code is compiled into the image
> multiple times, one time for each board. The intention was that the
> linker throws away the unused copies via -ffunction-section and
> --gc-sections. Unfortunately this does not work because the functions in
> the different copies all end up with the same name. So for example we
> have mem_precharge_and_activate() three times in the image. Only one
> version is used, but the others can't be thrown away because they are in
> the same section.
One thing that comes to mind is gcc -flto. My experience shows that it works
much nicer than gc-sections. It hurts on large code bases though but i guess 
this can be neglected with barebox.

> I hope we can solve this, otherwise we have to split the xloader
> defconfigs into multiple configs.
It would be indeed nicer if the compiler could sort that out.

Best regards
Tim


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