From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Sowjanya Komatineni <skomatineni@nvidia.com>
Cc: jonathanh@nvidia.com, mkarthik@nvidia.com, smohammed@nvidia.com,
talho@nvidia.com, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org
Subject: Re: [PATCH V11 3/5] i2c: tegra: Add DMA support
Date: Wed, 6 Feb 2019 20:37:36 +0300 [thread overview]
Message-ID: <37987664-d354-4f89-cc60-9cc37ca87322@gmail.com> (raw)
In-Reply-To: <5e66803c-b13b-cb00-e2ff-d096a1650612@gmail.com>
06.02.2019 17:56, Dmitry Osipenko пишет:
> 06.02.2019 17:53, Thierry Reding пишет:
>> On Tue, Feb 05, 2019 at 05:26:25PM +0300, Dmitry Osipenko wrote:
>> [...]
>>> Oh, another important moment is that physically contiguous dma_buf
>>> allocation isn't guaranteed by the DMA API. This may become a problem
>>> for T186+ that can transfer up to 64K. We need to enforce the
>>> contiguous-allocation requirement by using
>>> dma_alloc_attrs(DMA_ATTR_FORCE_CONTIGUOUS) instead of the
>>> dma_alloc_coherent(), please see my other comment below.
>>
>> Actually I don't think that's necessary here. DMA_ATTR_FORCE_CONTIGUOUS
>> only seems relevant if you've got an IOMMU attached to the device to
>> make sure the physical memory is also contiguous.
>>
>> See this extract from Documentation/DMA-attributes.txt:
>>
>> | DMA_ATTR_FORCE_CONTIGUOUS
>> | -------------------------
>> |
>> | By default DMA-mapping subsystem is allowed to assemble the buffer
>> | allocated by dma_alloc_attrs() function from individual pages if it can
>> | be mapped as contiguous chunk into device dma address space. By
>> | specifying this attribute the allocated buffer is forced to be contiguous
>> | also in physical memory.
>>
>> We don't have an IOMMU attached to I2C or APBDMA, so this can't happen
>> and even if we had an IOMMU attached, all we care about is the device's
>> DMA address space, which means IOVA space, and that would still be
>> guaranteed to be contiguous, according to the above.
>
> Yes, but doesn't T186+ have IOMMU support for the DMA controller?
>
Ah, sorry I probably skimmed way too quickly thorough the message. Hmm.. well, seems I was wrong.
Sowjanya, after all looks like it should be fine to use the default dma_alloc_coherent() helper. Please put it back in v14.
next prev parent reply other threads:[~2019-02-06 17:37 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-05 8:56 [PATCH V11 1/5] i2c: tegra: sort all the include headers alphabetically Sowjanya Komatineni
2019-02-05 8:56 ` Sowjanya Komatineni
2019-02-05 8:56 ` [PATCH V11 2/5] i2c: tegra: add bus clear Master Support Sowjanya Komatineni
2019-02-05 8:56 ` Sowjanya Komatineni
2019-02-05 8:56 ` [PATCH V11 3/5] i2c: tegra: Add DMA support Sowjanya Komatineni
2019-02-05 8:56 ` Sowjanya Komatineni
2019-02-05 14:26 ` Dmitry Osipenko
2019-02-05 16:41 ` Sowjanya Komatineni
2019-02-05 16:54 ` Dmitry Osipenko
2019-02-06 14:53 ` Thierry Reding
2019-02-06 14:56 ` Dmitry Osipenko
2019-02-06 17:37 ` Dmitry Osipenko [this message]
2019-02-06 19:56 ` Sowjanya Komatineni
2019-02-06 20:02 ` Dmitry Osipenko
2019-02-07 7:16 ` Christoph Hellwig
2019-02-05 8:56 ` [PATCH V11 4/5] i2c: tegra: update transfer timeout Sowjanya Komatineni
2019-02-05 8:56 ` Sowjanya Komatineni
2019-02-05 8:56 ` [PATCH V11 5/5] i2c: tegra: add i2c interface timing support Sowjanya Komatineni
2019-02-05 8:56 ` Sowjanya Komatineni
2019-02-05 14:28 ` Dmitry Osipenko
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