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From: Jim Lewis <jlewis@mvista.com>
To: Claude Robitaille <crobitaille@videotron.ca>
Cc: linuxppc-embedded <linuxppc-embedded@lists.linuxppc.org>
Subject: Re: Strange behavior on FADS with ICTRL==0
Date: Sat, 09 Oct 1999 10:18:37 -0500	[thread overview]
Message-ID: <37FF5CCD.41B88659@mvista.com> (raw)
In-Reply-To: Pine.LNX.4.10.9910091003020.6027-100000@localhost.localdomain


Claude and Dan:

Thanks for the pointers. I do have an old chip and the erratta does describe this
problem. Shame on me for not having looked at the erratta!
-Jim Lewis

Claude Robitaille wrote:

> Check the version of the chip and change it to a B2 version if it is
> not it. You should be able to get a sample.
>
> Claude
>
> > Jim Lewis wrote:
> >
> >
> > > ........ If the ISCT_SER field of the
> > > ICTRL register is set to 0 (which is the value on reset), the system is
> > > very unstable.
> >
> > You have to be very careful with the configuration of 8xx control and
> > debug registers.  Depending upon the silicon revision, there are certain
> > errata that require explicit settings of these registers.  This is certainly
> > one of them.....some die require serialization to be set, others require you
> > never set it, others require subsequent software work around depending
> > upon the setting.
> >


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

  reply	other threads:[~1999-10-09 15:18 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
1999-10-09  2:17 Strange behavior on FADS with ICTRL==0 Jim Lewis
1999-10-09 13:17 ` Dan Malek
1999-10-09 14:05   ` Claude Robitaille
1999-10-09 15:18     ` Jim Lewis [this message]
1999-10-14  0:44 ` Enet on FADS Claude Robitaille
1999-10-14 22:59   ` Jim Lewis
1999-10-15  0:48     ` Claude Robitaille
1999-10-18 20:19       ` Dan Malek

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