From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B243C34021 for ; Mon, 17 Feb 2020 15:35:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 635C120725 for ; Mon, 17 Feb 2020 15:35:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1581953708; bh=8efhOOieeB7D17j3jQ31Byut/zxDybXrDad5pZgzM6g=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=QC0w2eS4V6s2CtQsdY6/Jy/kI1Icy2sb02buD07S/HPWnGWKFGCIqrUq965RWX2b0 hNL1D4VSjc6rzX+q2rGpvGLAI1TeqkH6CorOUXf4t/SZO3I0IZUL6DQTGlir74XNsN 6EGIN69Kr11opONPQumrk5AnUqrhxCzqblAlq6p4= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728124AbgBQPfE (ORCPT ); Mon, 17 Feb 2020 10:35:04 -0500 Received: from mail.kernel.org ([198.145.29.99]:42880 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727976AbgBQPfE (ORCPT ); Mon, 17 Feb 2020 10:35:04 -0500 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 380E020718; Mon, 17 Feb 2020 15:35:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1581953703; bh=8efhOOieeB7D17j3jQ31Byut/zxDybXrDad5pZgzM6g=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=GUBKrAqfG8eSWxLQWWL2Hm7nfXDbOjgbkjFFHnQy6utvXaBluk+63gdAGLNnTeb30 H6BGDGTl6RRv71CiGYfZQM6e2IQ6OJd6B6ojZFHMj8nAM7Y+I5YMylksMDqdvFABaM 7usA1EvhAx1vDJlpGyn37JrX8xFPvBnuoK+EtALk= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1j3iQH-005xOP-JS; Mon, 17 Feb 2020 15:35:01 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 17 Feb 2020 15:35:01 +0000 From: Marc Zyngier To: Lorenzo Pieralisi Cc: Pankaj Bansal , Ard Biesheuvel , Makarand Pawagi , Calvin Johnson , stuyoder@gmail.com, nleeder@codeaurora.org, Ioana Ciornei , Cristi Sovaiala , Hanjun Guo , Will Deacon , jon@solid-run.com, Russell King , ACPI Devel Maling List , Len Brown , Jason Cooper , Andy Wang , Varun Sethi , Thomas Gleixner , linux-arm-kernel , Laurentiu Tudor , Paul Yang , netdev@vger.kernel.org, "Rafael J. Wysocki" , Linux Kernel Mailing List , Shameerali Kolothum Thodi , Sudeep Holla , Robin Murphy Subject: Re: [EXT] Re: [PATCH] bus: fsl-mc: Add ACPI support for fsl-mc In-Reply-To: <20200217152518.GA18376@e121166-lin.cambridge.arm.com> References: <12531d6c569c7e14dffe8e288d9f4a0b@kernel.org> <7349fa0e6d62a3e0d0e540f2e17646e0@kernel.org> <20200214161957.GA27513@e121166-lin.cambridge.arm.com> <20200214174949.GA30484@e121166-lin.cambridge.arm.com> <20200217152518.GA18376@e121166-lin.cambridge.arm.com> Message-ID: <384eb5378ee2b240d6ab7d89aef2d5c7@kernel.org> X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/1.3.10 X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: lorenzo.pieralisi@arm.com, pankaj.bansal@nxp.com, ard.biesheuvel@linaro.org, makarand.pawagi@nxp.com, calvin.johnson@nxp.com, stuyoder@gmail.com, nleeder@codeaurora.org, ioana.ciornei@nxp.com, cristian.sovaiala@nxp.com, guohanjun@huawei.com, will@kernel.org, jon@solid-run.com, linux@armlinux.org.uk, linux-acpi@vger.kernel.org, lenb@kernel.org, jason@lakedaemon.net, Andy.Wang@arm.com, V.Sethi@nxp.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, laurentiu.tudor@nxp.com, Paul.Yang@arm.com, netdev@vger.kernel.org, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, shameerali.kolothum.thodi@huawei.com, sudeep.holla@arm.com, robin.murphy@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org On 2020-02-17 15:25, Lorenzo Pieralisi wrote: > On Mon, Feb 17, 2020 at 12:35:12PM +0000, Pankaj Bansal wrote: Hi Lorenzo, [...] >> > Side note: can you explain to me please how the MSI allocation flow >> > and kernel data structures/drivers are modeled in DT ? I had a quick >> > look at: >> > >> > drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c >> > >> > and to start with, does that code imply that we create a >> > DOMAIN_BUS_FSL_MC_MSI on ALL DT systems with an ITS device node ? >> >> Yes. It's being done for all DT systems having ITS node. > > This does not seem correct to me, I will let Marc comment on > the matter. Unfortunately, there isn't a very good way to avoid that ATM, other than defering the registration of the irqdomain until we know that a particular bus (for example a PCIe RC) is registered. I started working on that at some point, and ended up nowhere because no bus (PCI, FSL, or anything else) really give us the right information when it is actually required (when a device starts claiming interrupts). I *think* we could try a defer it until a bus root is found, and that this bus has a topological link to an ITS. probably invasive though, as you would need a set of "MSI providers" for each available irqchip node. In short, messy. But I'd be happy to revive this and have a look again. M. -- Jazz is not dead. It just smells funny... From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8F5FC34021 for ; Mon, 17 Feb 2020 15:35:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8639220718 for ; Mon, 17 Feb 2020 15:35:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="t6GsGtO5"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="GUBKrAqf" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8639220718 Authentication-Results: mail.kernel.org; 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Mon, 17 Feb 2020 15:35:01 +0000 MIME-Version: 1.0 Date: Mon, 17 Feb 2020 15:35:01 +0000 From: Marc Zyngier To: Lorenzo Pieralisi Subject: Re: [EXT] Re: [PATCH] bus: fsl-mc: Add ACPI support for fsl-mc In-Reply-To: <20200217152518.GA18376@e121166-lin.cambridge.arm.com> References: <12531d6c569c7e14dffe8e288d9f4a0b@kernel.org> <7349fa0e6d62a3e0d0e540f2e17646e0@kernel.org> <20200214161957.GA27513@e121166-lin.cambridge.arm.com> <20200214174949.GA30484@e121166-lin.cambridge.arm.com> <20200217152518.GA18376@e121166-lin.cambridge.arm.com> Message-ID: <384eb5378ee2b240d6ab7d89aef2d5c7@kernel.org> X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/1.3.10 X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: lorenzo.pieralisi@arm.com, pankaj.bansal@nxp.com, ard.biesheuvel@linaro.org, makarand.pawagi@nxp.com, calvin.johnson@nxp.com, stuyoder@gmail.com, nleeder@codeaurora.org, ioana.ciornei@nxp.com, cristian.sovaiala@nxp.com, guohanjun@huawei.com, will@kernel.org, jon@solid-run.com, linux@armlinux.org.uk, linux-acpi@vger.kernel.org, lenb@kernel.org, jason@lakedaemon.net, Andy.Wang@arm.com, V.Sethi@nxp.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, laurentiu.tudor@nxp.com, Paul.Yang@arm.com, netdev@vger.kernel.org, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, shameerali.kolothum.thodi@huawei.com, sudeep.holla@arm.com, robin.murphy@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200217_073504_550159_99DBAF32 X-CRM114-Status: GOOD ( 14.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Calvin Johnson , stuyoder@gmail.com, nleeder@codeaurora.org, Ioana Ciornei , Cristi Sovaiala , Hanjun Guo , Will Deacon , Pankaj Bansal , jon@solid-run.com, Russell King , ACPI Devel Maling List , Len Brown , Jason Cooper , Andy Wang , Makarand Pawagi , Varun Sethi , Thomas Gleixner , linux-arm-kernel , Laurentiu Tudor , Paul Yang , Ard Biesheuvel , netdev@vger.kernel.org, "Rafael J. Wysocki" , Linux Kernel Mailing List , Shameerali Kolothum Thodi , Sudeep Holla , Robin Murphy Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-02-17 15:25, Lorenzo Pieralisi wrote: > On Mon, Feb 17, 2020 at 12:35:12PM +0000, Pankaj Bansal wrote: Hi Lorenzo, [...] >> > Side note: can you explain to me please how the MSI allocation flow >> > and kernel data structures/drivers are modeled in DT ? I had a quick >> > look at: >> > >> > drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c >> > >> > and to start with, does that code imply that we create a >> > DOMAIN_BUS_FSL_MC_MSI on ALL DT systems with an ITS device node ? >> >> Yes. It's being done for all DT systems having ITS node. > > This does not seem correct to me, I will let Marc comment on > the matter. Unfortunately, there isn't a very good way to avoid that ATM, other than defering the registration of the irqdomain until we know that a particular bus (for example a PCIe RC) is registered. I started working on that at some point, and ended up nowhere because no bus (PCI, FSL, or anything else) really give us the right information when it is actually required (when a device starts claiming interrupts). I *think* we could try a defer it until a bus root is found, and that this bus has a topological link to an ITS. probably invasive though, as you would need a set of "MSI providers" for each available irqchip node. In short, messy. But I'd be happy to revive this and have a look again. M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel