From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH] x86: guard against port I/O overlapping the RTC/CMOS range
Date: Fri, 17 Jul 2020 15:10:43 +0200 [thread overview]
Message-ID: <38c73e17-30b8-27b4-bc7c-e6ef7817fa1e@suse.com> (raw)
Since we intercept RTC/CMOS port accesses, let's do so consistently in
all cases, i.e. also for e.g. a dword access to [006E,0071]. To avoid
the risk of unintended impact on Dom0 code actually doing so (despite
the belief that none ought to exist), also extend
guest_io_{read,write}() to decompose accesses where some ports are
allowed to be directly accessed and some aren't.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/pv/emul-priv-op.c
+++ b/xen/arch/x86/pv/emul-priv-op.c
@@ -210,7 +210,7 @@ static bool admin_io_okay(unsigned int p
return false;
/* We also never permit direct access to the RTC/CMOS registers. */
- if ( ((port & ~1) == RTC_PORT(0)) )
+ if ( port <= RTC_PORT(1) && port + bytes > RTC_PORT(0) )
return false;
return ioports_access_permitted(d, port, port + bytes - 1);
@@ -297,6 +297,17 @@ static uint32_t guest_io_read(unsigned i
if ( pci_cfg_ok(currd, port & 3, size, NULL) )
sub_data = pci_conf_read(currd->arch.pci_cf8, port & 3, size);
}
+ else if ( ioports_access_permitted(currd, port, port) )
+ {
+ if ( bytes > 1 && !(port & 1) &&
+ ioports_access_permitted(currd, port, port + 1) )
+ {
+ sub_data = inw(port);
+ size = 2;
+ }
+ else
+ sub_data = inb(port);
+ }
if ( size == 4 )
return sub_data;
@@ -373,25 +384,31 @@ static int read_io(unsigned int port, un
return X86EMUL_OKAY;
}
+static void _guest_io_write(unsigned int port, unsigned int bytes,
+ uint32_t data)
+{
+ switch ( bytes )
+ {
+ case 1:
+ outb((uint8_t)data, port);
+ if ( amd_acpi_c1e_quirk )
+ amd_check_disable_c1e(port, (uint8_t)data);
+ break;
+ case 2:
+ outw((uint16_t)data, port);
+ break;
+ case 4:
+ outl(data, port);
+ break;
+ }
+}
+
static void guest_io_write(unsigned int port, unsigned int bytes,
uint32_t data, struct domain *currd)
{
if ( admin_io_okay(port, bytes, currd) )
{
- switch ( bytes )
- {
- case 1:
- outb((uint8_t)data, port);
- if ( amd_acpi_c1e_quirk )
- amd_check_disable_c1e(port, (uint8_t)data);
- break;
- case 2:
- outw((uint16_t)data, port);
- break;
- case 4:
- outl(data, port);
- break;
- }
+ _guest_io_write(port, bytes, data);
return;
}
@@ -420,6 +437,13 @@ static void guest_io_write(unsigned int
if ( pci_cfg_ok(currd, port & 3, size, &data) )
pci_conf_write(currd->arch.pci_cf8, port & 3, size, data);
}
+ else if ( ioports_access_permitted(currd, port, port) )
+ {
+ if ( bytes > 1 && !(port & 1) &&
+ ioports_access_permitted(currd, port, port + 1) )
+ size = 2;
+ _guest_io_write(port, size, data);
+ }
if ( size == 4 )
return;
next reply other threads:[~2020-07-17 13:11 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-17 13:10 Jan Beulich [this message]
2020-07-20 10:52 ` [PATCH] x86: guard against port I/O overlapping the RTC/CMOS range Roger Pau Monné
2020-07-20 11:58 ` Jan Beulich
2020-07-20 13:22 ` Roger Pau Monné
2020-07-24 12:11 ` Andrew Cooper
2020-07-24 14:19 ` Jan Beulich
2020-08-24 12:32 ` Ping: " Jan Beulich
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