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From: Jun Sun <jsun@mvista.com>
To: linux-mips@fnet.fr, linux@cthulhu.engr.sgi.com
Subject: R5000 support (specifically two-way set-associative cache...)
Date: Mon, 19 Jun 2000 15:58:40 -0700	[thread overview]
Message-ID: <394EA5A0.B882F66A@mvista.com> (raw)


I looked into the R5000 support and have a couple of questions:

1. Is R5000, specifically NEC Vr5000, fully supported?  I have seen
CONFIG_CPU_R5000 defined, but it does not appear to do much.

2. Specifically, NEC Vr5000 has two-way set-associative cache.  I
browsed through the cache code, and got concerned that I don't see any
code that seems to take care of that.  Do I miss something?

3. I understand Geert has a port to DDB5074 (with Vr5000 CPU).  Is this
port completed (including all interrupts, PCI related stuff).  Is this
port reliable?


Thanks a lot.

Jun

             reply	other threads:[~2000-06-19 23:02 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2000-06-19 22:58 Jun Sun [this message]
2000-06-20  1:51 ` R5000 support (specifically two-way set-associative cache...) Ralf Baechle
2000-06-20  8:44 ` Geert Uytterhoeven
2000-06-20  9:47 ` Dominic Sweetman
2000-06-20 10:02   ` Geert Uytterhoeven
2000-06-20 18:41   ` Jun Sun
2000-06-20 19:01     ` Jun Sun
2000-06-20 20:59       ` Dominic Sweetman
2000-07-01  1:22         ` Jun Sun
  -- strict thread matches above, loose matches on Subject: below --
2000-07-01  6:46 Kevin D. Kissell
2000-07-01  6:46 ` Kevin D. Kissell

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