From: Dan Malek <dan@netx4.com>
To: Ralph Blach <rcblach@raleigh.ibm.com>
Cc: linuxppc-embedded@lists.linuxppc.org
Subject: Re: error in assumptions in the handling of interrupts.
Date: Fri, 28 Jul 2000 11:13:42 -0400 [thread overview]
Message-ID: <3981A326.39228806@embeddededge.com> (raw)
In-Reply-To: 398178CF.6AEAF91E@raleigh.ibm.com
Ralph Blach wrote:
> This will NOT work because for Level interrupts, the ISR will cannot be
> reset until
> the interrupting source is cleared.
It works for Level interrupts on the 8xx and 8260.......
> The ack to reset the ISR for interrupt must go in the
>
> ppcxxx_aic_enable
So, put it there. All of these functions should be unique to
the 405GP interrupt controller. You are free to implement this
as you wish.
-- Dan
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2000-07-28 15:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2000-07-28 12:13 error in assumptions in the handling of interrupts Ralph Blach
2000-07-28 15:13 ` Dan Malek [this message]
2000-07-28 17:30 ` Frank Rowand
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