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From: Marc Zyngier <maz@kernel.org>
To: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
	Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Mark Brown <broonie@kernel.org>,
	kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [RFC 10/10] KVM: arm64: nv: Add new HDFGRTR2_GROUP & HDFGRTR2_GROUP based FGU handling
Date: Tue, 13 Aug 2024 08:16:15 +0100	[thread overview]
Message-ID: <39b14f98acfa1afcbdcb46950c62e6c7@kernel.org> (raw)
In-Reply-To: <6c479aba-10b9-46ba-92fa-d3b20cc82d61@arm.com>

On 2024-08-13 07:53, Anshuman Khandual wrote:
> On 8/4/24 16:35, Marc Zyngier wrote:
>> which shows that an SPMEVFILT2Rn_EL0 access from EL1 traps to EL2 if:
>> 
>> - either HDFGRTR2_EL2.nSPMEVTYPERn_EL0 == '0', (check)
>> - or MDCR_EL2.EnSPM == '0', (check)
>> - or SPMACCESSR_EL2<(UInt(SPMSELR_EL0.SYSPMUSEL) * 2) + 
>> 1:UInt(SPMSELR_EL0.SYSPMUSEL) * 2> == '00'
>> 
>> and that last condition requires some more handling as you need to
>> evaluate both SPMSELR_EL0.SYSPMUSEL and the corresponding field of
>> SPMACCESSR_EL2 to make a decision. It's not majorly complicated, but
>> it isn't solved by simply setting a static attribute.
> 
> So IIUC you are suggesting to handle SYS_SPMEVFILT2R_EL0() registers 
> via
> complex condition checks where the CGT_XXX can be directed to a 
> function
> callback instead ? For example, something like the following 
> (untested).

[...]

Something like that, yes.

         M.
-- 
Jazz is not dead. It just smells funny...

      reply	other threads:[~2024-08-13  7:16 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-20  6:57 [RFC 00/10] KVM: arm64: Enable fine grained undefined for MDSELR_EL1 Anshuman Khandual
2024-06-20  6:57 ` [RFC 01/10] arm64/sysreg: Update ID_AA64MMFR0_EL1 register Anshuman Khandual
2024-06-20  6:57 ` [RFC 02/10] arm64/sysreg: Update ID_AA64DFR0_EL1 register Anshuman Khandual
2024-06-20  6:58 ` [RFC 03/10] arm64/sysreg: Add register fields for ID_AA64DFR2_EL1 Anshuman Khandual
2024-06-20  6:58 ` [RFC 04/10] arm64/sysreg: Add register fields for HDFGRTR2_EL2 Anshuman Khandual
2024-06-20  6:58 ` [RFC 05/10] arm64/sysreg: Add register fields for HDFGWTR2_EL2 Anshuman Khandual
2024-06-20  6:58 ` [RFC 06/10] arm64/sysreg: Add register fields for MDSELR_EL1 Anshuman Khandual
2024-06-20  6:58 ` [RFC 07/10] arm64/sysreg: Add register fields for PMSID_EL1 Anshuman Khandual
2024-06-20  6:58 ` [RFC 08/10] arm64/sysreg: Add register fields for TRBIDR_EL1 Anshuman Khandual
2024-06-20  6:58 ` [RFC 09/10] KVM: arm64: nv: Enable HDFGRTR2_EL2 & HDFGWTR2_EL2 access from virtual EL2 Anshuman Khandual
2024-06-20  6:58 ` [RFC 10/10] KVM: arm64: nv: Add new HDFGRTR2_GROUP & HDFGRTR2_GROUP based FGU handling Anshuman Khandual
2024-06-20 11:06   ` Marc Zyngier
2024-06-21  7:56     ` Anshuman Khandual
2024-06-21 11:24       ` Marc Zyngier
2024-06-25  9:03         ` Anshuman Khandual
2024-06-25 13:58           ` Marc Zyngier
2024-08-01 10:46             ` Anshuman Khandual
2024-08-01 16:03               ` Marc Zyngier
2024-08-02  9:25                 ` Anshuman Khandual
2024-08-02 10:59                   ` Marc Zyngier
2024-08-03 10:38                     ` Anshuman Khandual
2024-08-04 11:05                       ` Marc Zyngier
2024-08-13  6:53                         ` Anshuman Khandual
2024-08-13  7:16                           ` Marc Zyngier [this message]

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