From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH v2 1/5] x86/mwait-idle: stop exposing platform acronyms
Date: Thu, 20 Jan 2022 15:01:45 +0100 [thread overview]
Message-ID: <39f83895-e01a-bfd8-708b-eedbb145d5fb@suse.com> (raw)
In-Reply-To: <568cb6dc-127a-9c8f-0073-2df173d4677b@suse.com>
This follows Linux commit de09cdd09fa1 ("intel_idle: stop exposing
platform acronyms in sysfs"), but their main justifications (sysfs
exposure and similarity with acpi-idle) don't apply to us. The field is
only used in a single printk() right now, but having the platform tags
there isn't useful either.
Requested-by: Roger Pau Monné <roger.pau@citrix.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: New.
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -134,25 +134,25 @@ static const struct cpuidle_state {
*/
static const struct cpuidle_state nehalem_cstates[] = {
{
- .name = "C1-NHM",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 3,
.target_residency = 6,
},
{
- .name = "C1E-NHM",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C3-NHM",
+ .name = "C3",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 20,
.target_residency = 80,
},
{
- .name = "C6-NHM",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 200,
.target_residency = 800,
@@ -162,31 +162,31 @@ static const struct cpuidle_state nehale
static const struct cpuidle_state snb_cstates[] = {
{
- .name = "C1-SNB",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 2,
.target_residency = 2,
},
{
- .name = "C1E-SNB",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C3-SNB",
+ .name = "C3",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 80,
.target_residency = 211,
},
{
- .name = "C6-SNB",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 104,
.target_residency = 345,
},
{
- .name = "C7-SNB",
+ .name = "C7",
.flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 109,
.target_residency = 345,
@@ -196,31 +196,31 @@ static const struct cpuidle_state snb_cs
static const struct cpuidle_state byt_cstates[] = {
{
- .name = "C1-BYT",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 1,
.target_residency = 1,
},
{
- .name = "C6N-BYT",
+ .name = "C6N",
.flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 300,
.target_residency = 275,
},
{
- .name = "C6S-BYT",
+ .name = "C6S",
.flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 500,
.target_residency = 560,
},
{
- .name = "C7-BYT",
+ .name = "C7",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 1200,
.target_residency = 4000,
},
{
- .name = "C7S-BYT",
+ .name = "C7S",
.flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 10000,
.target_residency = 20000,
@@ -230,31 +230,31 @@ static const struct cpuidle_state byt_cs
static const struct cpuidle_state cht_cstates[] = {
{
- .name = "C1-CHT",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 1,
.target_residency = 1,
},
{
- .name = "C6N-CHT",
+ .name = "C6N",
.flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 80,
.target_residency = 275,
},
{
- .name = "C6S-CHT",
+ .name = "C6S",
.flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 200,
.target_residency = 560,
},
{
- .name = "C7-CHT",
+ .name = "C7",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 1200,
.target_residency = 4000,
},
{
- .name = "C7S-CHT",
+ .name = "C7S",
.flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 10000,
.target_residency = 20000,
@@ -264,31 +264,31 @@ static const struct cpuidle_state cht_cs
static const struct cpuidle_state ivb_cstates[] = {
{
- .name = "C1-IVB",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 1,
.target_residency = 1,
},
{
- .name = "C1E-IVB",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C3-IVB",
+ .name = "C3",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 59,
.target_residency = 156,
},
{
- .name = "C6-IVB",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 80,
.target_residency = 300,
},
{
- .name = "C7-IVB",
+ .name = "C7",
.flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 87,
.target_residency = 300,
@@ -298,25 +298,25 @@ static const struct cpuidle_state ivb_cs
static const struct cpuidle_state ivt_cstates[] = {
{
- .name = "C1-IVT",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 1,
.target_residency = 1,
},
{
- .name = "C1E-IVT",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 80,
},
{
- .name = "C3-IVT",
+ .name = "C3",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 59,
.target_residency = 156,
},
{
- .name = "C6-IVT",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 82,
.target_residency = 300,
@@ -326,25 +326,25 @@ static const struct cpuidle_state ivt_cs
static const struct cpuidle_state ivt_cstates_4s[] = {
{
- .name = "C1-IVT-4S",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 1,
.target_residency = 1,
},
{
- .name = "C1E-IVT-4S",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 250,
},
{
- .name = "C3-IVT-4S",
+ .name = "C3",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 59,
.target_residency = 300,
},
{
- .name = "C6-IVT-4S",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 84,
.target_residency = 400,
@@ -354,25 +354,25 @@ static const struct cpuidle_state ivt_cs
static const struct cpuidle_state ivt_cstates_8s[] = {
{
- .name = "C1-IVT-8S",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 1,
.target_residency = 1,
},
{
- .name = "C1E-IVT-8S",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 500,
},
{
- .name = "C3-IVT-8S",
+ .name = "C3",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 59,
.target_residency = 600,
},
{
- .name = "C6-IVT-8S",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 88,
.target_residency = 700,
@@ -382,49 +382,49 @@ static const struct cpuidle_state ivt_cs
static const struct cpuidle_state hsw_cstates[] = {
{
- .name = "C1-HSW",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 2,
.target_residency = 2,
},
{
- .name = "C1E-HSW",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C3-HSW",
+ .name = "C3",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 33,
.target_residency = 100,
},
{
- .name = "C6-HSW",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 133,
.target_residency = 400,
},
{
- .name = "C7s-HSW",
+ .name = "C7s",
.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 166,
.target_residency = 500,
},
{
- .name = "C8-HSW",
+ .name = "C8",
.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 300,
.target_residency = 900,
},
{
- .name = "C9-HSW",
+ .name = "C9",
.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 600,
.target_residency = 1800,
},
{
- .name = "C10-HSW",
+ .name = "C10",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 2600,
.target_residency = 7700,
@@ -434,49 +434,49 @@ static const struct cpuidle_state hsw_cs
static const struct cpuidle_state bdw_cstates[] = {
{
- .name = "C1-BDW",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 2,
.target_residency = 2,
},
{
- .name = "C1E-BDW",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C3-BDW",
+ .name = "C3",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 40,
.target_residency = 100,
},
{
- .name = "C6-BDW",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 133,
.target_residency = 400,
},
{
- .name = "C7s-BDW",
+ .name = "C7s",
.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 166,
.target_residency = 500,
},
{
- .name = "C8-BDW",
+ .name = "C8",
.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 300,
.target_residency = 900,
},
{
- .name = "C9-BDW",
+ .name = "C9",
.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 600,
.target_residency = 1800,
},
{
- .name = "C10-BDW",
+ .name = "C10",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 2600,
.target_residency = 7700,
@@ -486,49 +486,49 @@ static const struct cpuidle_state bdw_cs
static struct cpuidle_state __read_mostly skl_cstates[] = {
{
- .name = "C1-SKL",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 2,
.target_residency = 2,
},
{
- .name = "C1E-SKL",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C3-SKL",
+ .name = "C3",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 70,
.target_residency = 100,
},
{
- .name = "C6-SKL",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 85,
.target_residency = 200,
},
{
- .name = "C7s-SKL",
+ .name = "C7s",
.flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 124,
.target_residency = 800,
},
{
- .name = "C8-SKL",
+ .name = "C8",
.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 200,
.target_residency = 800,
},
{
- .name = "C9-SKL",
+ .name = "C9",
.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 480,
.target_residency = 5000,
},
{
- .name = "C10-SKL",
+ .name = "C10",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 890,
.target_residency = 5000,
@@ -538,19 +538,19 @@ static struct cpuidle_state __read_mostl
static struct cpuidle_state __read_mostly skx_cstates[] = {
{
- .name = "C1-SKX",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 2,
.target_residency = 2,
},
{
- .name = "C1E-SKX",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C6-SKX",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 133,
.target_residency = 600,
@@ -560,19 +560,19 @@ static struct cpuidle_state __read_mostl
static const struct cpuidle_state icx_cstates[] = {
{
- .name = "C1-ICX",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 1,
.target_residency = 1,
},
{
- .name = "C1E-ICX",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 4,
.target_residency = 4,
},
{
- .name = "C6-ICX",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 170,
.target_residency = 600,
@@ -582,25 +582,25 @@ static const struct cpuidle_state icx_cs
static const struct cpuidle_state atom_cstates[] = {
{
- .name = "C1E-ATM",
+ .name = "C1E",
.flags = MWAIT2flg(0x00),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C2-ATM",
+ .name = "C2",
.flags = MWAIT2flg(0x10),
.exit_latency = 20,
.target_residency = 80,
},
{
- .name = "C4-ATM",
+ .name = "C4",
.flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 100,
.target_residency = 400,
},
{
- .name = "C6-ATM",
+ .name = "C6",
.flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 140,
.target_residency = 560,
@@ -610,31 +610,31 @@ static const struct cpuidle_state atom_c
static const struct cpuidle_state tangier_cstates[] = {
{
- .name = "C1-TNG",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 1,
.target_residency = 4,
},
{
- .name = "C4-TNG",
+ .name = "C4",
.flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 100,
.target_residency = 400,
},
{
- .name = "C6-TNG",
+ .name = "C6",
.flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 140,
.target_residency = 560,
},
{
- .name = "C7-TNG",
+ .name = "C7",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 1200,
.target_residency = 4000,
},
{
- .name = "C9-TNG",
+ .name = "C9",
.flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 10000,
.target_residency = 20000,
@@ -644,13 +644,13 @@ static const struct cpuidle_state tangie
static const struct cpuidle_state avn_cstates[] = {
{
- .name = "C1-AVN",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 2,
.target_residency = 2,
},
{
- .name = "C6-AVN",
+ .name = "C6",
.flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 15,
.target_residency = 45,
@@ -660,13 +660,13 @@ static const struct cpuidle_state avn_cs
static const struct cpuidle_state knl_cstates[] = {
{
- .name = "C1-KNL",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 1,
.target_residency = 2,
},
{
- .name = "C6-KNL",
+ .name = "C6",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 120,
.target_residency = 500,
@@ -676,43 +676,43 @@ static const struct cpuidle_state knl_cs
static struct cpuidle_state __read_mostly bxt_cstates[] = {
{
- .name = "C1-BXT",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 2,
.target_residency = 2,
},
{
- .name = "C1E-BXT",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C6-BXT",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 133,
.target_residency = 133,
},
{
- .name = "C7s-BXT",
+ .name = "C7s",
.flags = MWAIT2flg(0x31) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 155,
.target_residency = 155,
},
{
- .name = "C8-BXT",
+ .name = "C8",
.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 1000,
.target_residency = 1000,
},
{
- .name = "C9-BXT",
+ .name = "C9",
.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 2000,
.target_residency = 2000,
},
{
- .name = "C10-BXT",
+ .name = "C10",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 10000,
.target_residency = 10000,
@@ -722,19 +722,19 @@ static struct cpuidle_state __read_mostl
static const struct cpuidle_state dnv_cstates[] = {
{
- .name = "C1-DNV",
+ .name = "C1",
.flags = MWAIT2flg(0x00),
.exit_latency = 2,
.target_residency = 2,
},
{
- .name = "C1E-DNV",
+ .name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 10,
.target_residency = 20,
},
{
- .name = "C6-DNV",
+ .name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 50,
.target_residency = 500,
next prev parent reply other threads:[~2022-01-20 14:02 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-20 14:00 [PATCH v2 0/5] x86/mwait-idle: updates from Linux (and more) Jan Beulich
2022-01-20 14:01 ` Jan Beulich [this message]
2022-01-20 14:31 ` [PATCH v2 1/5] x86/mwait-idle: stop exposing platform acronyms Roger Pau Monné
2022-01-20 14:02 ` [PATCH v2 2/5] x86/mwait-idle: switch to using bool Jan Beulich
2022-01-20 14:34 ` Roger Pau Monné
2022-01-20 14:02 ` [PATCH v2 3/5] x86/mwait-idle: add SnowRidge C-state table Jan Beulich
2022-01-20 14:04 ` [PATCH RFC v2 4/5] x86/mwait-idle: enable interrupts before C1 on Xeons Jan Beulich
2022-01-20 15:52 ` Roger Pau Monné
2022-01-24 14:44 ` Jan Beulich
2022-01-25 12:43 ` Roger Pau Monné
2022-01-20 14:05 ` [PATCH RFC v2 5/5] x86/mwait-idle: squash stats update when not actually entering C-state Jan Beulich
2022-01-20 16:00 ` Roger Pau Monné
2022-01-20 16:21 ` Jan Beulich
2022-01-21 9:32 ` Roger Pau Monné
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