From: Manfred <manfred@colorfullife.com>
To: mingo@redhat.com, "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>,
linux-kernel@vger.kernel.org
Subject: mpparse.c question
Date: Fri, 02 Feb 2001 17:04:20 +0100 [thread overview]
Message-ID: <3A7ADA84.6892DE07@colorfullife.com> (raw)
I've started cleaning up mpparse.c/ioapic.c for the addition of acpi
support, but I got stuck in the mess of global variables.
What's the purpose of of the irq_2_pin in io_apic.c?
I assume that I overlook something, but afaics the code allows one
physical interrupt source (e.g. INTA from device 9 on pci bus 0) to
arrive at multiple ioapic pins.
Can that happen, is that important?
Silly question: Why can't we ignore all but the first pin? If we don't
enable the additional pins, we don't have to disable them during
disable_irq().
disable_irq() and enable_irq() seem to be the only users of irq_2_pin.
Btw, is is correct that the isa irq's are always connected to the first
io apic? find_isa_irq_pin() doesn't handle that, and the caller just
access io apic 0.
--
Manfred
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next reply other threads:[~2001-02-02 16:04 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-02-02 16:04 Manfred [this message]
2001-02-02 17:16 ` mpparse.c question Maciej W. Rozycki
2001-02-02 17:45 ` Ingo Molnar
2001-02-02 18:20 ` Maciej W. Rozycki
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