From: Jeremy Jackson <jeremy.jackson@sympatico.ca>
To: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Jaswinder Singh <jaswinder.singh@3disystems.com>,
peterw@dascom.com.au, "Albert D. Cahalan" <acahalan@cs.uml.edu>,
linux-kernel@vger.kernel.org
Subject: Re: Kernel executation from ROM
Date: Mon, 19 Feb 2001 17:26:11 -0500 [thread overview]
Message-ID: <3A919D83.FCC2EF5B@sympatico.ca> (raw)
In-Reply-To: <XFMail.20010219124909.peterw@dascom.com.au> <01e701c09a2a$21e789a0$bba6b3d0@Toshiba> <3A914E57.9990EB7C@sympatico.ca> <m1snlazc39.fsf@frodo.biederman.org>
"Eric W. Biederman" wrote:
> No it forbids executing boot roms that way, by a standard pc bios.
> The system BIOS in a PC is normally on the ISA bus which is reached
> across via the PCI bus with a PCI->ISA bridge.
Son of a gun, I missed that... sure enough my PIIX4 docs beside me here
show a #BIOSCS pin on the southbridge... Can anybody clarify what
this restriction does and doesn't apply to ? The MindShare PCI Arch.
book where I got that info from doesn't elaborate that much.
> The thing is slow it really doesn't matter, all you need to do is
> enable caching on that area of the physical address space. You can't
> do this on the alpha currently but only because the alpha sucks that
> way. You can on practically everything else.
>
> As for ROM being slow on x86 you can enable the MTRR to speed things
Don't MTRR's just do write combining?
>
> up. Usually though ROMs are at least as expensive as RAM, so it is
> pointless.
next prev parent reply other threads:[~2001-02-19 22:30 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <XFMail.20010219124909.peterw@dascom.com.au>
2001-02-19 4:12 ` Kernel executation from ROM Jaswinder Singh
2001-02-19 9:28 ` Bernd Eckenfels
2001-02-19 16:48 ` Jeremy Jackson
2001-02-19 19:50 ` Eric W. Biederman
2001-02-19 22:26 ` Jeremy Jackson [this message]
[not found] <XFMail.20010220082732.peterw@dascom.com.au>
2001-02-20 5:04 ` Eric W. Biederman
2001-02-19 2:38 Jaswinder Singh
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