From: Vipin Malik <vipin.malik@daniel.com>
To: "chris.read@activesilicon.co.uk" <chris.read@activesilicon.co.uk>
Cc: "'mtd@infradead.org'" <mtd@infradead.org>
Subject: Re: Brownouts
Date: Fri, 27 Apr 2001 09:36:07 -0500 [thread overview]
Message-ID: <3AE983D7.E377707D@daniel.com> (raw)
In-Reply-To: 01C0CF15.C21A24D0.chris.read@activesilicon.co.uk
Chris Read wrote:
> As a follow up to my earlier message:
>
> I am currently working with Intel B3 parts. The datasheet makes no specific
> mention of any built in brownout detection. However, there are a set of
> timings for the reset line. Specifically, it states that it may take up to
> 22us to reset the internal state machine during an erase or write cycle
> after the reset pin is asserted. My interpretation of this, in the absence
> of any explicit information, is that whilst erasing or programming, the
> reset line must be asserted a minimum of 22us before the power supply falls
> below the chip's minVcc specification, otherwise the results are
> undefined.....and we all know what that can mean.
>
> Any thoughts/experiences?
IMHO, you'r reading too much into the spec.
If this was my design, based on this spec that you posted, I would be happy
with this 22 us of power *up* reset. There is usually nothing to worry about
power down reset *for the flash chip*. Of course, you may want your processor
to be in reset when VCC falls out of spec to prevent it from misbehaving.
All IMHO.
Vipin
>
>
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prev parent reply other threads:[~2001-04-27 14:34 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-04-27 11:29 Brownouts Chris Read
2001-04-27 14:36 ` Vipin Malik [this message]
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