From: Philips <philips@iph.to>
To: linux-kernel@vger.kernel.org
Subject: Re: threading question
Date: Wed, 13 Jun 2001 17:17:51 +0300 [thread overview]
Message-ID: <3B27760F.41A0635D@iph.to> (raw)
In-Reply-To: <200106121858.f5CIwmX05650@ns.caldera.de> <Pine.LNX.4.30.0106121304320.24593-100000@gene.pbi.nrc.ca> <20010613142026.B13623@garloff.etpnet.phys.tue.nl> <20010613153528.A1711@werewolf.able.es>
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"J . A . Magallon" wrote:
>
> On 20010613 Kurt Garloff wrote:
> >
> > What I do in my numerics code to avoid this problem, is to create all the
> > threads (as many as there are CPUs) on program startup and have then wait
> > (block) for a condition. As soon as there's something to to, variables for
> > the thread are setup (protected by a mutex) and the thread gets signalled
> > (cond_signal).
> > If you're interested in the code, tell me.
> >
>
> I use the reverse approach. you feed work to the threads, I create the threads
> and let them ask for work to a master until it says 'done'. When the
> master is queried for work, it locks a mutex, decide the next work for
> that thread, and unlocks it. I think it gives the lesser contention and
> is simpler to manage.
>
BTW.
Question was poping in my mind and finally got negative answer by my mind ;-)
Is it possible to make somethis like:
char a[100] = {...}
char b[100] = {...}
char c[100];
char d[100];
1: { // run this on first CPU
for (int i=0; i<100; i++) c[i] = a[i] + b[i];
};
2: { // run this on any other CPU
for (int i=0; i<100; i++) d[i] = a[i] * b[i];
};
...
// do something else...
...
wait 1,2; // to be sure c[] and d[] are ready.
what was popping in my mind - some prefix (like 0x66 Intel used for 32
instructions) to say this instruction should run on other CPU?
I know - stupid idea. Too many questions will arise.
If we will do
PREFIX jmp far some_routing
and this routing will run on other CPU not blocking current execution thread.
(who will clean stack? when?.. question without answers...)
Is there anything like this in computerworld? I heard about old computers that
have a speacial instruction set to implicit run code on given processor.
Is it possible to emulate this behavior on PCs?
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next prev parent reply other threads:[~2001-06-13 14:18 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-06-12 18:24 threading question ognen
2001-06-12 18:39 ` Davide Libenzi
2001-06-12 18:57 ` from dmesg: kernel BUG at inode.c:486 Olivier Sessink
2001-06-12 18:58 ` threading question Christoph Hellwig
2001-06-12 19:07 ` ognen
2001-06-12 19:15 ` Kip Macy
2001-06-12 19:29 ` Christoph Hellwig
2001-06-12 19:15 ` Christoph Hellwig
2001-06-13 12:20 ` Kurt Garloff
2001-06-13 13:35 ` J . A . Magallon
2001-06-13 14:17 ` Philips [this message]
2001-06-13 15:06 ` ognen
2001-06-12 21:44 ` Davide Libenzi
2001-06-12 21:48 ` ognen
2001-06-14 18:15 ` Alan Cox
2001-06-14 22:42 ` threading question (results after thread pooling) ognen
2001-06-14 23:00 ` Mike Castle
2001-06-12 21:58 ` threading question Albert D. Cahalan
2001-06-12 23:48 ` J . A . Magallon
2001-06-12 19:06 ` Kip Macy
2001-06-12 19:14 ` Alexander Viro
2001-06-12 19:25 ` Russell Leighton
2001-06-12 23:27 ` Mike Castle
2001-06-13 17:31 ` bert hubert
2001-06-14 6:45 ` Helge Hafting
2001-06-14 18:28 ` Alan Cox
2001-06-14 19:01 ` bert hubert
2001-06-14 19:22 ` Russell Leighton
2001-06-15 11:29 ` Anil Kumar
2001-06-14 23:05 ` J . A . Magallon
2001-06-16 14:16 ` Michael Rothwell
2001-06-16 15:19 ` Alan Cox
2001-06-16 18:33 ` Russell Leighton
2001-06-16 19:06 ` Michael Rothwell
2001-06-16 21:30 ` Coroutines [was Re: threading question] Russell Leighton
2001-06-12 22:41 ` threading question Pavel Machek
-- strict thread matches above, loose matches on Subject: below --
2001-06-13 19:05 Hubertus Franke
[not found] <fa.f6da6av.agod3u@ifi.uio.no>
[not found] ` <fa.e54jbkv.kg4r99@ifi.uio.no>
2001-06-16 22:22 ` Dan Maas
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