Re: SMP possible with AMD CPUs?

["Paul G. Allen" <pgallen@randomlogic.com>]

Stephen Torri wrote:
> 
> Are the AMD CPUs really geared at the silicon level for true SMP? Some
> friend of mine says that just because you can pull the state pin by a
> chipset to remove the CPU and start another doesn't say the CPU is really
> made for SMP. It just says that they have made it work through the
> chipset. I am not sure if the Intel family are really true SMP or not.
> 
> I would apprecite some feedback on this.
> 

The Athlon Thunderbird as well as the Athlon MP (which uses the new Palamino [sp?]) core) both have true SMP support. All the Athlon's have a bus that is based
upon the Alpha EV6 bus, which supports multiple processors (greater than just 2) running and a bus speed up to 400MHz (too bad the systems themselves can't
support this kind of speed). The MP chips have a faster core and some additional logic that gives them a 10 - 20% boost in performance over a straight Athlon.
Part of this logic is a feature such that, in the case of a cache miss, the CPU will check the cache on the other CPU to see if it has the data it needs. If it
does, it loads from that CPU, avoiding a memory access.

In addition, the EV6 bus has a separate bus for each CPU, as compared to the Intel SMP bus architecture which shares the bus. An Intel SMP machine will share
the available host bus bandwidth between the two CPUs, where the Athlon has a separate bus for each one.

PGA

-- 
Paul G. Allen
UNIX Admin II/Programmer
Akamai Technologies, Inc.
www.akamai.com
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