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[90.187.110.129]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aac0f014572sm2487281366b.151.2025.01.08.07.22.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Jan 2025 07:22:44 -0800 (PST) Date: Wed, 08 Jan 2025 14:23:43 +0000 From: Bernhard Beschow To: David Woodhouse , qemu-devel@nongnu.org, "Michael S. Tsirkin" CC: Thomas Huth , Paul Durrant , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum Subject: =?US-ASCII?Q?Re=3A_=5BPATCH=5D_hw/i386/pc=3A_Fix_level_inte?= =?US-ASCII?Q?rrupt_sharing_for_Xen_event_channel_GSI?= In-Reply-To: References: <20250107110718-mutt-send-email-mst@kernel.org> <8b2690f2c9532468fd5029d319737904b58acec2.camel@infradead.org> Message-ID: <3BC1A243-5481-4902-81B6-80135577847D@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=shentey@gmail.com; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Am 8=2E Januar 2025 11:26:57 UTC schrieb David Woodhouse : >On Wed, 2025-01-08 at 09:45 +0000, Bernhard Beschow wrote: >>=20 >>=20 >> Am 7=2E Januar 2025 16:20:28 UTC schrieb David Woodhouse >> : >> > On Tue, 2025-01-07 at 11:07 -0500, Michael S=2E Tsirkin wrote: >> > > On Thu, Dec 19, 2024 at 05:24:11PM +0100, David Woodhouse wrote: >> > > > From: David Woodhouse >> > > >=20 >> > > > The system GSIs are not designed for sharing=2E One device might >> > > > assert a >> > > > shared interrupt with qemu_set_irq() and another might deassert >> > > > it, and >> > > > the level from the first device is lost=2E >> > > >=20 >> > > > This could be solved by using a multiplexer which functions as >> > > > an OR >> > > > gate, much like the PCI code already implements for >> > > > pci_set_irq() for >> > > > muxing the INTx lines=2E >>=20 >> Just curious: Why not use that aporoach? Could >> > ail=2Ecom/> >> help? > >That looks very similar to hw/core/or-irq=2Ec which rth pointed out to >me=2E Is there a reason for both of them existing? Thanks for pointing out its existence! I totally expected it to exist unde= r hw/core/, next to split-irq=2E But it resides under hw/, next to irq=2Ec= =2E=2E=2E > >It would be theoretically possible to rework the x86 GSI handling to >use such a thing, yes=2E > >It would be a large yak-shaving task which exceeds the time I currently >have available for a bug fix, but I don't *always* let that stop me=2E > >More to the point though, I *still* wouldn't like the outcome=2E I still >want us to have a 'resample' callback when the interrupt is >acknowledged in the interrupt controller, to see if any of the inputs >still want the line to be asserted=2E > >That's the only way to handle it efficiently for VFIO INTx and for the >Xen GSI callback anyway=2E Good to know=2E Thanks! Best regards, Bernhard