From: Gerald Champagne <gerald.champagne@esstech.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Jun Sun <jsun@mvista.com>,
Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: pci config cycles on VRC-5477
Date: Tue, 12 Mar 2002 11:26:54 -0600 [thread overview]
Message-ID: <3C8E3A5E.6020709@esstech.com> (raw)
In-Reply-To: Pine.GSO.4.21.0203121013530.23527-100000@vervain.sonytel.be
>>>
>>>Did I miss something, or is this a bug?
>>>
>>Your understanding is correct. I think this is a bug.
>>
>>Do you actually see the bug happening? So far it has never hit me, but maybe
>>due to the drivers that are loaded on my configuration.
>>
>
> (IIRC) When I wrote the Vrc-5074 support, I thought about this as well.
> But then I noticed that this was already done by the upper PCI layer. Is this
> still true?
>
> Gr{oetje,eeting}s,
>
> Geert
You're right. It's not a problem. The code that disables interrupts right
here in drivers/pci/pci.c:
#define PCI_OP(rw,size,type) \
int pci_##rw##_config_##size (struct pci_dev *dev, int pos, type value) \
{ \
int res; \
unsigned long flags; \
if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
spin_lock_irqsave(&pci_lock, flags); \
res = dev->bus->ops->rw##_##size(dev, pos, value); \
spin_unlock_irqrestore(&pci_lock, flags); \
return res; \
}
I don't know why I missed that...
Thanks for the reply!
Gerald
prev parent reply other threads:[~2002-03-12 18:21 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-03-11 21:51 pci config cycles on VRC-5477 Gerald Champagne
2002-03-11 22:24 ` Jun Sun
2002-03-11 22:45 ` Gerald Champagne
2002-03-12 9:17 ` Geert Uytterhoeven
2002-03-12 17:26 ` Gerald Champagne [this message]
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