From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Malkowski Subject: Re: IBM xSeries 360 4 x Xeon kernel 2.2 problems Date: Mon, 12 Aug 2002 11:41:02 -0400 Sender: linux-smp-owner@vger.kernel.org Message-ID: <3D57D70E.F43EE73C@adc.com> References: <3D570F8E.B0B8EE96@charter.net> <1029147715.16216.129.camel@irongate.swansea.linux.org.uk> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Return-path: List-Id: Content-Type: text/plain; charset="us-ascii" To: Alan Cox Cc: Lisa & Eric Malkowski , linux-smp@vger.kernel.org, gordonl@world.std.com Alan- Thanks a ton. This works great. I realize interrupts are all on the first CPU, but this box will be doing primarily CPU work for userspace processes. Not spreading the interrupts across CPUs therefore won't be a problem. Plus we'll be heading for a 2.4 setup in the future and we'll phase out our 2.2 bound stuff. We've got 2.4 running on some of these systems also and it's been working fine. Thanks again, -- Eric Malkowski ADC - The Broadband Company Alan Cox wrote: > On Mon, 2002-08-12 at 02:29, Lisa & Eric Malkowski wrote: > > I've tried SMP 2.2.21 and 2.2.21-rc4 and get the same results. It > > behaves as if interrupts just aren't occurring at all. Apparently an > > APIC table isn't being parsed properly -- the boot messages below can > > help confirm this. > > If so you can boot with "noapic". > > Please be aware that the 2.2 kernel does not support PIV SMP, > Hyperthreading, PIV APIC IRQ load balancing and some other things. > Actually not working suprises me a little but not vastly.