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From: akuster <akuster@dslextreme.com>
To: akuster@dslextreme.com
Cc: jim <jduey@ccc-dcs.com>, linuxppc-embedded@lists.linuxppc.org
Subject: Re: Question about ppc4xx_dma.h
Date: Wed, 21 Aug 2002 12:39:19 -0700	[thread overview]
Message-ID: <3D63EC67.4000302@dslextreme.com> (raw)
In-Reply-To: 3D62CE63.1030606@dslextreme.com

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akuster wrote:
>
> jim wrote:
>
>> I've been trying to get DMA working on the 405GP and I've run across
>> something in ppc4xx_dma.h.
>>
>> In the function 'enable_dma' the following piece of code appears:
>>
>> (begin excerpt)
>>     /* for other xfer modes, the addresses are already set */
>>     control = mfdcr(DCRN_DMACR0);
>>     control &= ~(DMA_TM_MASK | DMA_TD);    /* clear all mode bits */
>>     if (p_dma_ch->mode == DMA_MODE_MM) {
>>         /* software initiated memory to memory */
>>         control |= control | DMA_ETD_OUTPUT | DMA_TCE_ENABLE;
>>     }
>>     control |= (p_dma_ch->mode | DMA_CH_ENABLE);
>>     mtdcr(DCRN_DMACR0, control);
>> (end excerpt)
>>
>> It looks to me like this code will always read/write the control
>> register for
>> DMA channel 0 regardless of the channel specified by the parameter
>> 'dmanr'
>> that is passed to the function.  Is this observation correct?
>
>
> good catch.
>
>> What would the
>> fix be, if so?
>>
> Most likey switch statment like the disable has.
>
> give me a day
>
> Armin
>
>
>
>
>

Here is the patch , please let me know it it helps.

Armin

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  reply	other threads:[~2002-08-21 19:39 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2002-08-20 15:26 Question about ppc4xx_dma.h jim
2002-08-20 23:18 ` akuster
2002-08-21 19:39   ` akuster [this message]
2002-08-21 22:17     ` Todd Poynor
2002-08-22  6:18       ` akuster
2002-08-27  3:44       ` akuster

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