Re: Strange panic as soon as timer interrupts are enabled (recent 2.5)

[Andrew Morton <akpm@digeo.com>]

"Martin J. Bligh" wrote:
> 
> >> Yes, this caused for me, a completely reliable boot time panic with 2.5.46.
> >> The problem is that per_cpu areas aren't initiallised until cpu_up is called,
> >> so a cpu cannot now take an interrupt before cpu_up is called.
> >
> > Rusty's da man on this, but I think the fix is to not turn on
> > the interrupts (at the APIC level) until cpu_up() has called
> > __cpu_up().  Look at cpu_up():
> >
> >         ret = notifier_call_chain(&cpu_chain, CPU_UP_PREPARE, hcpu);
> >         if (ret == NOTIFY_BAD) {
> >                 printk("%s: attempt to bring up CPU %u failed\n",
> >                                 __FUNCTION__, cpu);
> >                 ret = -EINVAL;
> >                 goto out_notify;
> >         }
> >
> >         /* Arch-specific enabling code. */
> >         ret = __cpu_up(cpu);
> >
> > The softirq storage is initialised inside the CPU_UP_PREPARE call.
> > So we're ready for interrupts on that CPU when your architecture's
> > __cpu_up() is called.  And no sooner than this.
> 
> All interrupts, or just softints?
> 

I don't know.  This sequencing really needs to be thought about
and written down, else we'll just have an ongoing fiasco trying
to graft stuff onto it.

In this case I'd say "all interrupts".  The secondary really
should be 100% dormant until all CPU_UP_PREPARE callouts have
been run and have returned NOTIFY_OK.

At least, that's how I'd have designed it.