From: Hartvig Ekner <hartvig@ekner.info>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: Linux MIPS mailing list <linux-mips@linux-mips.org>
Subject: Re: MIPS32 cache functions now using c-r4k?
Date: Wed, 16 Apr 2003 19:51:35 +0200 [thread overview]
Message-ID: <3E9D9827.F2565C70@ekner.info> (raw)
In-Reply-To: 20030416165919.A15111@linux-mips.org
Hi Ralf,
I'll test it out a little later this evening. But I think there is a typo and this patch should
be applied:
Index: pg-r4k.S
===================================================================
RCS file: /home/cvs/linux/arch/mips/mm/pg-r4k.S,v
retrieving revision 1.2.2.4
diff -u -r1.2.2.4 pg-r4k.S
--- pg-r4k.S 16 Apr 2003 17:00:23 -0000 1.2.2.4
+++ pg-r4k.S 16 Apr 2003 17:46:36 -0000
@@ -63,7 +63,7 @@
sw zero, 4(a0)
sw zero, 8(a0)
sw zero, 12(a0)
- addiu a0, 64
+ addiu a0, 32
sw zero, -16(a0)
sw zero, -12(a0)
sw zero, -8(a0)
/Hartvig
Ralf Baechle wrote:
> On Wed, Apr 16, 2003 at 09:54:28AM +0200, Hartvig Ekner wrote:
>
> > It seems much of the r4k cache code assumes the presence of SD - which
> > breaks on all MIPS32 CPU's?
>
> Nothing a soldering iron and some patience couldn't fix ;)
>
> Try below patch,
>
> Ralf
next prev parent reply other threads:[~2003-04-16 17:50 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-04-16 7:54 MIPS32 cache functions now using c-r4k? Hartvig Ekner
2003-04-16 12:59 ` Kevin D. Kissell
2003-04-16 13:19 ` Maciej W. Rozycki
2003-04-16 14:08 ` Ralf Baechle
2003-04-16 16:51 ` Jun Sun
2003-04-16 13:17 ` Maciej W. Rozycki
2003-04-16 14:59 ` Ralf Baechle
2003-04-16 17:51 ` Hartvig Ekner [this message]
2003-04-16 19:19 ` Ralf Baechle
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