From: Callebaut Benoit <callebaut@mailandnews.com>
To: linuxppc-embedded@lists.linuxppc.org
Subject: DMA & cache coherency on 8245
Date: Fri, 9 May 2003 08:15:35 -0400 [thread overview]
Message-ID: <3EBF1042@mailandnews.com> (raw)
I,
I have written DMA functions to do software initiateds DMA transfers on the
8245. But I have some problem with cache I think.
I allocated the buffers for DMA, configure the DMA (I use no snooping) and
launch it.
There is only part of the data that are transfered when doing mem-mem dmas or
nothing at all when doing mem-pci transfers.
I tried to use invalidate_dcache_range on the block (allocated with
__get_free_pages ) but it crashed (Exception 0X300 (memory access)).
How can I be sure of the coherency of the cache ?
Thanks,
Benoit Callebaut
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reply other threads:[~2003-05-09 12:15 UTC|newest]
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