Re: [parisc-linux] Re: [parisc-linux-cvs] linux carlos

["Joel Soete" <jsoe0708@tiscali.be>]

Hi Grant,

>AFAIK, a cacheline will get loaded as "shared clean"
>until someone writes to it - which is when the cacheline ping-pong
>starts.

Mhh would it not request some kind of ipc between cpu for cache management?

But to avoid usage of cache would it be possible to access global kernel's
variable with absolute addressing mode? Is it feasible?

...

btw scaning code related to SMP I find in smp.c a very draft of an 'ipi_init()'
but unfortunately 'Ignore for now. *May* need this "hook" to register IPI
handler'..., interesting isn't it :).
Is there any other platform inplementing such stuff (I try to scan 2.4 src
but not found anywhere else) or some reference on to implement it?


>PAT PDC (L-/N-class and A500) have hard coded numbers for CPUs.
>parisc-linux only uses logical CPU numbers to avoid sparsely populated
>arrays. parisc-linux can get the  "Physical CPU #" from PAT PDC.
>See code inside USE_PAT_CPUID in arch/parisc/kernel/processor.c.
>You might hack that code a bit so you can correlate logic to physical
>CPU numbers.

Ah see better now, it answers to another question.

Thanks,
    Joel




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